XS3A Test modes need validating

xmos / lib_xud

XMOS USB code and associated examples

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XS3A Test modes need validating #64

Open xross opened 3 years ago

xross commented 3 years ago

The USB 2.0 Specification mandates Test Mode support (See 7.1.20 of the USB 2.0 Specification). These facilitate compliance testing and all high-speed capable devices must support them. These test modes are:

Test_SE0_NAK
Test_J
Test_K
Test_Packet

Test modes are entered via commands from the host using the USBHSETT tool (see https://www.usb.org/compliancetools) All fours test modes have been implemented for XS3A. They have had some rough checking along with the levels.

mbanth commented 3 years ago

@xross, could you please explain what you mean by 'test modes' and 'levels'. These terms are sufficiently ambiguous that I do not understand what work needs completed.

xross commented 3 years ago

I have updated the description. By levels I mean voltage - this is measured whilst the device is in test_J/K and SE0_NAK modes. See "4.3 J and K Voltage Levels" of USB 2.0 Electrical Compliance Test Specification Version 1.07 here: https://www.usb.org/document-library/usb-20-electrical-compliance-test-specification-version-107

XMOS-JoeG commented 6 months ago

For xs3, I have found the SE0_NAK test mode has an issue where the device never responds with NAK packets despite being given correct IN packets. Having had a look there is an error in the PID checking where we are using a register value that has been trampled over by the crc checking instructions. May also be an error in that we should respond (with NAK) to all addresses, not just the address we have been enumerated as.