I am looking for a way to do application level simulation of an STM32F4 project. The goal is to compile and run the application on the desktop. The key IO being simulated and the rest stubbed out to harmless values. For this application, UART, GPIO, ADC, SPI, and I2C are the critical peripherals which talk to the outside world. Some using DMA.
Most of the QEMU implementations for STM32 platform seems focused on unit tests. This QEMU fork appears to be the most advanced in supporting the STM32F4 boards along with Andre @Beckus's (https://github.com/beckus/qemu_stm32).
I suspect this is due to accurate emulation being difficult. That is to say, developing these peripherals and simulating their behavior with QEMU is difficult.
Since my constraints do not necessarily require strict emulation (though it would be nice) and merely simulation, I wonder what the fine developers of this fork might recommend. How would you approach this problem?
Greetings,
I am looking for a way to do application level simulation of an STM32F4 project. The goal is to compile and run the application on the desktop. The key IO being simulated and the rest stubbed out to harmless values. For this application, UART, GPIO, ADC, SPI, and I2C are the critical peripherals which talk to the outside world. Some using DMA.
Most of the QEMU implementations for STM32 platform seems focused on unit tests. This QEMU fork appears to be the most advanced in supporting the STM32F4 boards along with Andre @Beckus's (https://github.com/beckus/qemu_stm32).
I suspect this is due to accurate emulation being difficult. That is to say, developing these peripherals and simulating their behavior with QEMU is difficult.
Since my constraints do not necessarily require strict emulation (though it would be nice) and merely simulation, I wonder what the fine developers of this fork might recommend. How would you approach this problem?
Cheers, Joe