Open YusufKhan-gamedev opened 6 months ago
Hi,mention The Linux 6.8 kernel already supports the configuration of CM5-EVB natively, and we can add support for laptop on this basis. In the near future, we will push the configuration of CM5-LAPTOP to the main line. Thank you for your support.
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From: YusufKhan-human Date: 2024-05-26 00:05 To: yanyitech/coolpi-kernel CC: coolpi-george; Mention Subject: [yanyitech/coolpi-kernel] CM5-V10 Laptop mainline DTS (Issue #2) Hi @coolpi-george! Recently I have been looking at the prospects of writting a mainline ready DTS for the CM5 V10 Laptops, below is something small I cooked up quickly, I have not tested it yet. // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /*
*/ /dts-v1/;
/ { model = "RK3588 CoolPi CM5 NoteBook Board"; compatible = "coolpi,pi-cm5-v10-laptop", "coolpi,pi-cm5", "rockchip,rk3588"; backlight: backlight { compatible = "pwm-backlight"; enable-gpios = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&bl_en>; power-supply = <&vcc12v_dcin>; pwms = <&pwm6 0 100000 0>; }; leds: leds { compatible = "gpio-leds"; pinctrl-names = "default"; pinctrl-0 =<&leds_gpio>; status = "okay"; led1: led-cm5 { label = "coreboard"; gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; linux,default-trigger = "none"; }; led2: led-charging { label = "charging"; gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>; linux,default-trigger = "cw2015-battery-charging"; }; led3: led-charge-full { label = "chargeok"; gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; linux,default-trigger = "cw2015-battery-full"; }; }; vcc12v_dcin: vcc12v-dcin-regulator { compatible = "regulator-fixed"; regulator-name = "vcc12v_dcin"; regulator-always-on; regulator-boot-on; regulator-min-microvolt = <12000000>; regulator-max-microvolt = <12000000>; }; vcc5v0_sys: vcc5v0-sys-regulator { compatible = "regulator-fixed"; regulator-name = "vcc5v0_sys"; regulator-always-on; regulator-boot-on; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; vin-supply = <&vcc12v_dcin>; }; vcc3v3_sys: vcc3v3-sys-regulator { compatible = "regulator-fixed"; regulator-name = "vcc3v3_sys"; regulator-always-on; regulator-boot-on; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; vin-supply = <&vcc12v_dcin>; }; vcc3v3_lcd: vcc3v3-lcd-regulator { compatible = "regulator-fixed"; regulator-name = "vcc3v3_lcd"; enable-active-high; gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&lcdpwr_en>; vin-supply = <&vcc3v3_sys>; }; vcc5v0_usb_host1: vcc5v0_usb_host2: vcc5v0-usb-host-regulator { compatible = "regulator-fixed"; regulator-name = "vcc5v0_host"; enable-active-high; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&usb_host_pwren &keyboard_en>; vin-supply = <&vcc5v0_sys>; }; wifi_reg_on: wifi-reg-on { compatible = "regulator-fixed"; regulator-name = "wifi_on"; regulator-boot-on; regulator-always-on; enable-active-high; gpio = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>; vin-supply = <&vcc5v0_sys>; pinctrl-names = "default"; pinctrl-0 = <&wifi_pwron>; }; }; &pcie30phy { status = "okay"; }; / M.2 M-Key ssd / &pcie3x4 { reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; vpcie3v3-supply = <&vcc3v3_sys>; status = "okay"; }; / M.2 E-Key / &pcie2x1l1 { reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; vpcie3v3-supply = <&vcc3v3_sys>; pinctrl-names = "default"; pinctrl-0 = <&pcie_clkreq &pcie_wake &pcie_rst &wifi_pwron>; status = "okay"; }; &pinctrl { gpio-leds { leds_gpio: leds-gpio { rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_down>, <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>, <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_down>; }; }; usb { usb_host_pwren: usb-host-pwren { rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_output_high>; }; keyboard_en: keyboard-en { rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_output_high>; }; }; wifi { pcie_rst: pcie-rst { rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; }; pcie_clkreq: pcie-clkreq { rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; }; pcie_wake: pcie-wake { rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; }; wifi_pwron: wifi-pwron { rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; }; }; lcd { lcdpwr_en: lcdpwr-en { rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>; }; bl_en: bl-en { rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; }; }; touch { tp_int: tp-int { rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; }; tp_rst: tp-rst { rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; }; }; }; &sata1 { status = "okay"; }; &u2phy2 { status = "okay"; }; &u2phy3 { status = "okay"; }; &u2phy2_host { phy-supply = <&vcc5v0_usb_host1>; status = "okay"; }; &u2phy3_host { status = "okay"; }; &usb_host0_ehci { status = "okay"; }; &usb_host0_ohci { status = "okay"; }; &usb_host1_ehci { status = "okay"; }; &usb_host1_ohci { status = "okay"; }; &gpu { mali-supply = <&vdd_gpu_s0>; mem-supply = <&vdd_gpu_mem_s0>; status = "okay"; };
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Hi @coolpi-george! Recently I have been looking at the prospects of writting a mainline ready DTS for the CM5 V10 Laptops, below is something small I cooked up quickly, I have not tested it yet.