Extended use of Makefile.ini

[GoogleCodeExporter]

Hi,

I am currently trying to use Makefile.ini for working on top of the pdf
files generated from my .tex files.

Specifically, I have report1.tex, report2.tex and cover.pdf.

report1.tex -> report1.pdf
report2.tex -> report2.pdf
report2.pdf + cover.pdf -> final_report.pdf

The first two actions are handled by your Makefile. The last one
(concatenating pdf files) are handled by extra rules I wrote in the
Makefile.ini file.

The issue is that, in my Makefile.ini, I have final_report.pdf as a target
that depends on report2.pdf. Thus, when I type 'make', report2.pdf and
final_report.pdf are compiled from .tex. However, report1.pdf is not since
it is no more a needed target. 

It looks like the target I added in my Makefile.ini is now the default one,
probably because it is the first target to be parsed by the Makefile
(including of Makefile.ini happens very early).

So my question is if I am using the Makefile.ini in a way that was not
intended and, if so, what would you advise as a work around. There are
several other occasions when adding auxiliary targets (and rules) would be
useful and we should find a solution that does not overwrite what the
Makefile is capable of.

Cheers,
Thomas

Original issue reported on code.google.com by lavergne...@gmail.com on 9 Mar 2010 at 12:09

[GoogleCodeExporter]

This is a difficult question to answer, since I really want to allow people to 
do fairly 
arbitrary things with Makefile.ini.  If I include it too late, then it loses 
some of its 
power (e.g., to override variables like LATEX).  If I include it too early, 
then things like 
you are mentioning occur.

Basically, I rely on people typing "make all" when they want to make everything 
in the 
presence of a Makefile.ini file.

I'm looking for ideas, here, because others have had this issue, as well.  At 
the very 
least, I'd like a reliable way to alert the user that they have a Makefile.ini 
and that 
they either need to type "make all" or "make <target>" explicitly.

Original comment by shiblon on 9 Mar 2010 at 3:18

[GoogleCodeExporter]

I used to type 'make' and will (slowly) get used to type 'make all'. 

But it does not solve everything since we are missing a mechanism to add 
dependencies
into the 'all' target. As you mention, we can have our own 'make final_report' 
target
and type something like : 'make all && make final_report' or maybe even 'make
final_report all'

Several ideas:
1) have several Makefile.ini, included at various stages.
2) have several sections in one Makefile.ini and use conditionals for including 
them
at the right location;
3) define 'auxiliary targets' (a variable) that people are allowed to edit in 
the
Makefile.ini file  and that is appended to the 'all' target.

Original comment by lavergne...@gmail.com on 10 Mar 2010 at 2:37

[GoogleCodeExporter]

So, the complaint is that you can't add stuff to the "all" target?

That's not true.   Try doing the following:

all: final_report.pdf

That should do it.

Original comment by shiblon on 10 Mar 2010 at 2:48

[GoogleCodeExporter]

It works!!!! Thank you, I learned something today!

I did not know the 'all' target was 'additive'. I knew .PHONY was... Is it a 
fact
that all targets are additive?

Let's close this issue, then.

Original comment by lavergne...@gmail.com on 11 Mar 2010 at 4:58

[GoogleCodeExporter]

Yep, all targets are additive when they don't specify commands, unless they are 
:: 
targets, but those are just plain weird :)

Original comment by shiblon on 11 Mar 2010 at 7:01

• Changed state: WontFix