ytgui / temp

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consistency and coherency #91

Open ytgui opened 4 years ago

ytgui commented 4 years ago

https://zhuanlan.zhihu.com/p/58589781

ytgui commented 4 years ago

量化TLP那一章Models of Memory Consistency: An Introduction这一小节

Cache coherence ensures that multiple processors see a consistent view of memory. It does not answer the question of how consistent the view of memory must be. By “how consistent,” we are really asking when a processor must see a value that has been updated by another processor. Because processors communicate through shared variables (used both for data values and for synchronization), the question boils down to this: In what order must a processor observe the data writes of another processor? Because the only way to “observe the writes of another processor” is through reads, the question becomes what properties must be enforced among reads and writes to different locations by different processors?

只要有多个主体共享内存,肯定就有 consistency 的问题

In computer science, consistency models are used in distributed systems like distributed shared memory systems or distributed data stores (such as a filesystems, databases, optimistic replication systems or web caching). The system is said to support a given model if operations on memory follow specific rules. The data consistency model specifies a contract between programmer and system, wherein the system guarantees that if the programmer follows the rules, memory will be consistent and the results of reading, writing, or updating memory will be predictable. This is different from coherence, which occurs in systems that are cached or cache-less, and is consistency of data with respect to all processors. Coherence deals with maintaining a global order in which writes to a single location or single variable are seen by all processors. Consistency deals with the ordering of operations to multiple locations with respect to all processors.

除了数据一致性,顺序一致性也很重要

bool flag = false;
int product = 0;

void producer() {
    // 如果 memory 不能保证一致性,可能先写 flag 再写 product
    product = 1;
    flag = true;
}

int consumer() {
    while(!flag);
    return product;
}

Cache Coherence VS Consistency

The issue of exactly when a written value must be seen by a reader is defined by a memory consistency model. Coherence and consistency are complementary: Coherence defines the behavior of reads and writes to the same memory location, while consistency defines the behavior of reads and writes with respect to accesses to other memory locations.