Add definitions

[yuyuranium]

I've added the general definitions since we've done some testing and calculation and can determine the data width finally.

• data width: 16 bits
• word width: 128 bits
• address width: 12 bits

Note that we'll use little endian, e.g., put data0 in word[15:0] and data7 in word[127:112]

[yuyuranium]

I added a definition for simulating the global buffer, i.e., input sram, weight sram, and output sram. Since the simulator cannot simulate that many signals (4096 * 128 bits originally) so I think to simulate 256 entries (address begins from 0xf00 to 0xfff) is enough for now.