Closed yuyuranium closed 2 years ago
I have tested global_buffer.v
but failed at implementation. Here is the most primary error messeage in my opinion.
[Place 30-415] IO Placement failed due to overutilization. This design contains 267 I/O ports
while the target device: 7z020 package: clg400, contains only 255 available user I/O. The target device has 255 usable I/O pins of which 0 are already occupied by user-locked I/Os.
To rectify this issue:
1. Ensure you are targeting the correct device and package. Select a larger device or different package if necessary.
2. Check the top-level ports of the design to ensure the correct number of ports are specified.
3. Consider design changes to reduce the number of I/Os necessary.
Thanks for testing! I think you are right. The error occurs because Vivado wants to connect all the port, say 267 pins, to the I/O ports, which I think means the 255 pins on the PYNQ board.
How about the utilization report? Does Vivado synthesize the global buffer successfully? Does Vivado utilize BRAM's?
The following shows the utilization after changing GBUFF_ADDR_BEGIN
to 12'h000
. The I/O BUFs can be neglected.
Looks great! It's a great relief to know that our memory model is synthesizable. :smiling_face_with_tear:
I want to change the project name into simple-tpu instead of mm-acc, since the former sounds more awesome. XD
Therefore, you can see that in the commit message of edbee34
I used Add tpu
rather than Add mm acc
. (i.e., tpu is equivalent to mm acc)
I think I've finished the coding for the TPU. However, I didn't do any tests yet. Let's merge this branch into main first and I will open another branch for testing, simulating or modifying the code. Please have a look and feel free to give me comments. Thanks!
Awesome work! Thanks for your contributions! 💯
Thanks for work. You are my god...
I've been working on the verilog code for the accelerator. In this draft PR you can see my progress and give me some reviews so that I can improve my codes.