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zachjs / sv2v

SystemVerilog to Verilog conversion
BSD 3-Clause "New" or "Revised" License
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Attributes in expressions #236

Closed dwRchyngqxs closed 1 year ago

dwRchyngqxs commented 1 year ago

Hello, Inside the titan23 benchmark (https://www.eecg.utoronto.ca/~kmurray/titan.html) there is a SystemVerilog file with attributes after a binary operation ddr_addr_base_init[2] <= ddr_x[1] * (* multstyle = "logic" *) Nb;.

I am going to try implementing attributes on unary and binary operations unless you don't want them implemented at all.

zachjs commented 1 year ago

With your PR merged, I believe this should be resolved. Do you agree?

dwRchyngqxs commented 1 year ago

Yes, thank you for your help.