SDRAM fpgaportrst writing 0xFFFF touches reserved memory segments

[JDuchniewicz]

I am currently implementing the SDRAM control for my project on De0-Nano SoC (Cyclone V). According to the Cyclone V manual: writing 0xFFFF as done in bootscript post touches reserved memory. Maybe we should be writing just 13 bits instead?

[zangman]

Nice find - I think that's a valid point. If you are currently working on this part, could you give it a try and let me know if it works by writing just 0x1FFF instead? If yes, then I will update the references accordingly.

[JDuchniewicz]

I am still trying to get the FPGA2SDRAM communication going... I will let you know once it works.