nashif
commented
7 years ago by Mark Linkmeyer:
Robert Beatty and Andrew Boie , does this story more appropriately belong with the Memory Protection Unit Support epic (GH-1337)?
Open nashif opened 8 years ago
nashif
commented
7 years ago by Mark Linkmeyer:
Robert Beatty and Andrew Boie , does this story more appropriately belong with the Memory Protection Unit Support epic (GH-1337)?
Reported by Andrew Boie:
As a developer, I would like to add MPU support to Zephyr so that I can mark memory regions as instructions, read-only data, or read-write data. This should improve the security of the system in non-XIP scenarios and improve debugging.
From the CPU manual: When present and enabled, the MPU monitors all Nios II instruction fetches and data memory accesses to protect against errant software execution. The MPU is a hardware facility that system software uses to define memory regions and their associated access permissions. The MPU triggers an exception if software attempts to access a memory region in violation of its permissions, allowing you to intervene and handle the exception as appropriate. The precise exception effectively prevents the illegal access to memory.
The MPU extends the Nios II processor to support user mode and supervisor mode. Typically, system software runs in supervisor mode and end-user applications run in user mode, although all software can run in supervisor mode if desired. System software defines which MPU regions belong to supervisor mode and which belong to user mode.
(Imported from Jira ZEP-533)