[RESEARCH] Memory Protection Unit support

[nashif]

Reported by Andrew Boie:

Scope of this JIRA is to define what we want to do wrt Memory Protection in Zephyr and have a good idea on how it would be implemented. First targets for implementation are x86 and ARM.

• Work on arches that have MPU or MMU - no virtual memory
• Tasks start privileged by default, drop down to non-privileged status with API call
• Non-privileged threads cannot access memory that has not been allocated to it Prevent bugs or malware within a task from affecting other tasks, or the OS itself Unreliable software from third-party vendor, interpreters like zephyr.js, etc Software which we won't or can't verify full reliability No direct access to peripherals or privileged CPU features Aside from thread stack, additional memory regions may have access granted Flags for read / write / execute permissions

Relevant documentation:

• ARM Cortex M3 MPU - http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dai0179b/CHDFDFIG.html
• Nios II MPU - Section 3-7 https://www.altera.com/en_US/pdfs/literature/hb/nios2/n2cpu-nii5v1gen2.pdf
• x86 Manual - Volume 3A page 2747 , https://software.intel.com/sites/default/files/managed/39/c5/325462-sdm-vol-1-2abcd-3abcd.pdf

(Imported from Jira ZEP-1865)

[nashif]

by Andrew Boie:

• UM01001_embOS.pdf (size: 2333623)

[nashif]

by Andrew Boie:

Attaching EmbOS-MPU documentation. The source is not public but we can see in the PDF their design goals and API details.

[nashif]

by Andrew Boie:

Details on FreeRTOS implementation here: http://www.freertos.org/FreeRTOS-MPU-memory-protection-unit.html