Open nashif opened 7 years ago
by Andrew Boie:
by Andrew Boie:
More details to come soon -- we need to first identify an Xtensa CPU build that has an MPU (does sample_controller have it?) and replicate what Vincenzo did in the ARM code.
by Andrew Boie:
Only details I have been able to find are in the attached PDF. Lowering priority, we do not have a BU ask for this -- yet.
Reported by Andrew Boie:
We need to get the MPU up and running on Xtensa. Select an appropriate CPU design that has an MPU built in that we can run in either the xt-sim simulator or the Xtensa build of QEMU, and scope the work needed to get it enabled. The end goal is to have parity with the ARM MPU enabling work. Create additional user stories as appropriate.
(Imported from Jira ZEP-2266)