zephyrbot
commented
7 years ago by Juro Bystricky:
After a cursory look at the patch ( http://lists.nongnu.org/archive/html/qemu-devel/2017-02/msg06934.html ), it would seem the patch also implements baseprio register, hopefully making our own patch which implements this not needed anymore. In that case we could simply upgrade QEMU to the "master" (with a fixed commitish) . But this affects other CPUs as well, in particular Nios2 which is presently heavily patched and thus would require re-writing the patches. (This needs to be done anyway, but it is a major time sink). So first I will try to apply the armv7m patch to see if it applies cleanly to the current QEMU in Zephyr SDK.
Reported by Andrew Boie:
The ICSR RETTOBASE bit is improperly implemented in QEMU (the polarity is flipped) and the fix for it has not yet made it into a QEMU release, although it is present in upstream master branch.
The symptom is that if we are not in thread mode, the system always believes were are in a nested exception state, causing _IsInIsr() to always return true.
See upstream QEMU commit "armv7m: Rewrite NVIC to not use any GIC code"
(Imported from Jira SDK-54)