tests-ci : libraries: cmsis_dsp: support.fpu test Timeout

[hakehuang]

Describe the bug support.fpu test is Timeout on zephyr-v3.5.0-1427-gc1a6cfdf9bd8 on mimxrt1170_evk_cm7 testcase path is libraries/cmsis_dsp/support/fpu/arm_q15_to_q7_23

see logs for details

To Reproduce

1. scripts/twister --device-testing --device-serial /dev/ttyACM0 -p mimxrt1170_evk_cm7  --sub-test libraries.cmsis_dsp

   or

   # cd tests/libraries/cmsis_dsp/support/fpu/arm_q15_to_q7_23
   # west build -b mimxrt1170_evk_cm7
   # west flash

2. See error

Expected behavior test pass

Impact

Logs and console output

*** Booting Zephyr OS build zephyr-v3.5.0-1427-gc1a6cfdf9bd8 ***
Running TESTSUITE support_barycenter_f16
===================================================================
START - test_arm_barycenter_f16
PASS - test_arm_barycenter_f16 in 0.001 seconds
===================================================================
TESTSUITE support_barycenter_f16 succeeded
Running TESTSUITE support_barycenter_f32
===================================================================
START - test_arm_barycenter_f32
PASS - test_arm_barycenter_f32 in 0.001 seconds
===================================================================
TESTSUITE support_barycenter_f32 succeeded
Running TESTSUITE support_f16
===================================================================
START - test_arm_copy_f16_16
PASS - test_arm_copy_f16_16 in 0.001 seconds
===================================================================
START - test_arm_copy_f16_23
PASS - test_arm_copy_f16_23 in 0.001 seconds
===================================================================
START - test_arm_copy_f16_7
PASS - test_arm_copy_f16_7 in 0.001 seconds
===================================================================
START - test_arm_f16_to_float_16
PASS - test_arm_f16_to_float_16 in 0.001 seconds
===================================================================
START - test_arm_f16_to_float_23
PASS - test_arm_f16_to_float_23 in 0.001 seconds
===================================================================
START - test_arm_f16_to_float_7
PASS - test_arm_f16_to_float_7 in 0.001 seconds
===================================================================
START - test_arm_f16_to_q15_16
PASS - test_arm_f16_to_q15_16 in 0.001 seconds
===================================================================
START - test_arm_f16_to_q15_23
PASS - test_arm_f16_to_q15_23 in 0.001 seconds
===================================================================
START - test_arm_f16_to_q15_7
PASS - test_arm_f16_to_q15_7 in 0.001 seconds
===================================================================
START - test_arm_fill_f16_16
PASS - test_arm_fill_f16_16 in 0.001 seconds
===================================================================
START - test_arm_fill_f16_23
PASS - test_arm_fill_f16_23 in 0.001 seconds
===================================================================
START - test_arm_fill_f16_7
PASS - test_arm_fill_f16_7 in 0.001 seconds
===================================================================
START - test_arm_float_to_f16_16
PASS - test_arm_float_to_f16_16 in 0.001 seconds
===================================================================
START - test_arm_float_to_f16_23
PASS - test_arm_float_to_f16_23 in 0.001 seconds
===================================================================
START - test_arm_float_to_f16_7
PASS - test_arm_float_to_f16_7 in 0.001 seconds
===================================================================
START - test_arm_q15_to_f16_16
PASS - test_arm_q15_to_f16_16 in 0.001 seconds
===================================================================
START - test_arm_q15_to_f16_23
PASS - test_arm_q15_to_f16_23 in 0.001 seconds
===================================================================
START - test_arm_q15_to_f16_7
PASS - test_arm_q15_to_f16_7 in 0.001 seconds
===================================================================
START - test_arm_weighted_sum_f16_16
PASS - test_arm_weighted_sum_f16_16 in 0.001 seconds
===================================================================
START - test_arm_weighted_sum_f16_23
PASS - test_arm_weighted_sum_f16_23 in 0.001 seconds
===================================================================
START - test_arm_weighted_sum_f16_7
PASS - test_arm_weighted_sum_f16_7 in 0.001 seconds
===================================================================
TESTSUITE support_f16 succeeded
Running TESTSUITE support_f32
===================================================================
START - test_arm_copy_f32_11
PASS - test_arm_copy_f32_11 in 0.001 seconds
===================================================================
START - test_arm_copy_f32_3
PASS - test_arm_copy_f32_3 in 0.001 seconds
===================================================================
START - test_arm_copy_f32_8
PASS - test_arm_copy_f32_8 in 0.001 seconds
===================================================================
START - test_arm_fill_f32_11
PASS - test_arm_fill_f32_11 in 0.001 seconds
===================================================================
START - test_arm_fill_f32_3
PASS - test_arm_fill_f32_3 in 0.001 seconds
===================================================================
START - test_arm_fill_f32_8
PASS - test_arm_fill_f32_8 in 0.001 seconds
===================================================================
START - test_arm_float_to_q15_16
PASS - test_arm_float_to_q15_16 in 0.001 seconds
===================================================================
START - test_arm_float_to_q15_17
PASS - test_arm_float_to_q15_17 in 0.001 seconds
===================================================================
START - test_arm_float_to_q15_7
PASS - test_arm_float_to_q15_7 in 0.001 seconds
===================================================================
START - test_arm_float_to_q31_11
PASS - test_arm_float_to_q31_11 in 0.001 seconds
===================================================================
START - test_arm_float_to_q31_3
PASS - test_arm_float_to_q31_3 in 0.001 seconds
===================================================================
START - test_arm_float_to_q31_8
PASS - test_arm_float_to_q31_8 in 0.001 seconds
===================================================================
START - test_arm_float_to_q7_15
PASS - test_arm_float_to_q7_15 in 0.001 seconds
===================================================================
START - test_arm_float_to_q7_32
PASS - test_arm_float_to_q7_32 in 0.001 seconds
===================================================================
START - test_arm_float_to_q7_33
PASS - test_arm_float_to_q7_33 in 0.001 seconds
===================================================================
START - test_arm_merge_sort_const_16
PASS - test_arm_merge_sort_const_16 in 0.001 seconds
===================================================================
START - test_arm_merge_sort_out_11
PASS - test_arm_merge_sort_out_11 in 0.001 seconds
===================================================================
START - test_arm_sort_const_bitonic_16
PASS - test_arm_sort_const_bitonic_16 in 0.001 seconds
===================================================================
START - test_arm_sort_const_bubble_16
PASS - test_arm_sort_const_bubble_16 in 0.001 seconds
===================================================================
START - test_arm_sort_const_heap_16
PASS - test_arm_sort_const_heap_16 in 0.001 seconds
===================================================================
START - test_arm_sort_const_insertion_16
PASS - test_arm_sort_const_insertion_16 in 0.001 seconds
===================================================================
START - test_arm_sort_const_quick_16
PASS - test_arm_sort_const_quick_16 in 0.001 seconds
===================================================================
START - test_arm_sort_const_selection_16
PASS - test_arm_sort_const_selection_16 in 0.001 seconds
===================================================================
START - test_arm_sort_in_bitonic_32
PASS - test_arm_sort_in_bitonic_32 in 0.001 seconds
===================================================================
START - test_arm_sort_in_bubble_11
PASS - test_arm_sort_in_bubble_11 in 0.001 seconds
===================================================================
START - test_arm_sort_in_heap_11
PASS - test_arm_sort_in_heap_11 in 0.001 seconds
===================================================================
START - test_arm_sort_in_insertion_11
PASS - test_arm_sort_in_insertion_11 in 0.001 seconds
===================================================================
START - test_arm_sort_in_quick_11
PASS - test_arm_sort_in_quick_11 in 0.001 seconds
===================================================================
START - test_arm_sort_in_selection_11
PASS - test_arm_sort_in_selection_11 in 0.001 seconds
===================================================================
START - test_arm_sort_out_bitonic_16
PASS - test_arm_sort_out_bitonic_16 in 0.001 seconds
===================================================================
START - test_arm_sort_out_bitonic_32
PASS - test_arm_sort_out_bitonic_32 in 0.001 seconds
===================================================================
START - test_arm_sort_out_bubble_11
PASS - test_arm_sort_out_bubble_11 in 0.001 seconds
===================================================================
START - test_arm_sort_out_heap_11
PASS - test_arm_sort_out_heap_11 in 0.001 seconds
===================================================================
START - test_arm_sort_out_insertion_11
PASS - test_arm_sort_out_insertion_11 in 0.001 seconds
===================================================================
START - test_arm_sort_out_quick_11
PASS - test_arm_sort_out_quick_11 in 0.001 seconds
===================================================================
START - test_arm_sort_out_selection_11
PASS - test_arm_sort_out_selection_11 in 0.001 seconds
======SS - test_arm_q31_to_q15_3 in 0.001 seconds
===================================================================
START - test_arm_q31_to_q15_8
PASS - test_arm_q31_to_q15_8 in 0.001 seconds
===================================================================
START - test_arm_q31_to_q7_15
PASS - test_arm_q31_to_q7_15 in 0.001 seconds
===================================================================
START - test_arm_q31_to_q7_32
PASS - test_arm_q31_to_q7_32 in 0.001 seconds
===================================================================
START - test_arm_q31_to_q7_33
PASS - test_arm_q31_to_q7_33 in 0.001 seconds
===================================================================
TESTSUITE support_q31 succeeded
Running TESTSUITE support_q7
===================================================================
START - test_arm_copy_q7_15
PASS - test_arm_copy_q7_15 in 0.001 seconds
===================================================================
START - test_arm_copy_q7_32
PASS - test_arm_copy_q7_32 in 0.001 seconds
===================================================================
START - test_arm_copy_q7_47
PASS - test_arm_copy_q7_47 in 0.001 seconds
===================================================================
START - test_arm_fill_q7_15
PASS - test_arm_fill_q7_15 in 0.001 seconds
===================================================================
START - test_arm_fill_q7_32
PASS - test_arm_fill_q7_32 in 0.001 seconds
===================================================================
START - test_arm_fill_q7_47
PASS - test_arm_fill_q7_47 in 0.001 seconds
===================================================================
START - test_arm_q7_to_float_15
PASS - test_arm_q7_to_float_15 in 0.001 seconds
===================================================================
START - test_arm_q7_to_float_32
PASS - test_arm_q7_to_float_32 in 0.001 seconds
===================================================================
START - test_arm_q7_to_float_47
PASS - test_arm_q7_to_float_47 in 0.001 seconds
===================================================================
START - test_arm_q7_to_q15_15
PASS - test_arm_q7_to_q15_15 in 0.001 seconds
===================================================================
START - test_arm_q7_to_q15_32
PASS - test_arm_q7_to_q15_32 in 0.001 seconds
===================================================================
START - test_arm_q7_to_q15_47
PASS - test_arm_q7_to_q15_47 in 0.001 seconds
===================================================================
START - test_arm_q7_to_q31_15
PASS - test_arm_q7_to_q31_15 in 0.001 seconds
===================================================================
START - test_arm_q7_to_q31_32
PASS - test_arm_q7_to_q31_32 in 0.001 seconds
===================================================================
START - test_arm_q7_to_q31_47
PASS - test_arm_q7_to_q31_47 in 0.001 seconds
===================================================================
TESTSUITE support_q7 succeeded
------ TESTSUITE SUMMARY START ------
SUITE PASS - 100.00% [support_barycenter_f16]: pass = 1, fail = 0, skip = 0, total = 1 duration = 0.001 seconds
- PASS - [support_barycenter_f16.test_arm_barycenter_f16] duration = 0.001 seconds
SUITE PASS - 100.00% [support_barycenter_f32]: pass = 1, fail = 0, skip = 0, total = 1 duration = 0.001 seconds
- PASS - [support_barycenter_f32.test_arm_barycenter_f32] duration = 0.001 seconds
SUITE PASS - 100.00% [support_f16]: pass = 21, fail = 0, skip = 0, total = 21 duration = 0.021 seconds
- PASS - [support_f16.test_arm_copy_f16_16] duration = 0.001 seconds
- PASS - [support_f16.test_arm_copy_f16_23] duration = 0.001 seconds
- PASS - [support_f16.test_arm_copy_f16_7] duration = 0.001 seconds
- PASS - [support_f16.test_arm_f16_to_float_16] duration = 0.001 seconds
- PASS - [support_f16.test_arm_f16_to_float_23] duration = 0.001 seconds
- PASS - [support_f16.test_arm_f16_to_float_7] duration = 0.001 seconds
- PASS - [support_f16.test_arm_f16_to_q15_16] duration = 0.001 seconds
- PASS - [support_f16.test_arm_f16_to_q15_23] duration = 0.001 seconds
- PASS - [support_f16.test_arm_f16_to_q15_7] duration = 0.001 seconds
- PASS - [support_f16.test_arm_fill_f16_16] duration = 0.001 seconds
- PASS - [support_f16.test_arm_fill_f16_23] duration = 0.001 seconds
- PASS - [support_f16.test_arm_fill_f16_7] duration = 0.001 seconds
- PASS - [support_f16.test_arm_float_to_f16_16] duration = 0.001 seconds
- PASS - [support_f16.test_arm_float_to_f16_23] duration = 0.001 seconds
- PASS - [support_f16.test_arm_float_to_f16_7] duration = 0.001 seconds
- PASS - [support_f16.test_arm_q15_to_f16_16] duration = 0.001 seconds
- PASS - [support_f16.test_arm_q15_to_f16_23] duration = 0.001 seconds
- PASS - [support_f16.test_arm_q15_to_f16_7] duration = 0.001 seconds
- PASS - [support_f16.test_arm_weighted_sum_f16_16] duration = 0.001 seconds
- PASS - [support_f16.test_arm_weighted_sum_f16_23] duration = 0.001 seconds
- PASS - [support_f16.test_arm_weighted_sum_f16_7] duration = 0.001 seconds
SUITE PASS - 100.00% [support_f32]: pass = 39, fail = 0, skip = 0, total = 39 duration = 0.039 seconds
- PASS - [support_f32.test_arm_copy_f32_11] duration = 0.001 seconds
- PASS - [support_f32.test_arm_copy_f32_3] duration = 0.001 seconds
- PASS - [support_f32.test_arm_copy_f32_8] duration = 0.001 seconds
- PASS - [support_f32.test_arm_fill_f32_11] duration = 0.001 seconds
- PASS - [support_f32.test_arm_fill_f32_3] duration = 0.001 seconds
- PASS - [support_f32.test_arm_fill_f32_8] duration = 0.001 seconds
- PASS - [support_f32.test_arm_float_to_q15_16] duration = 0.001 seconds
- PASS - [support_f32.test_arm_float_to_q15_17] duration = 0.001 seconds
- PASS - [support_f32.test_arm_float_to_q15_7] duration = 0.001 seconds
- PASS - [support_f32.test_arm_float_to_q31_11] duration = 0.001 seconds
- PASS - [support_f32.test_arm_float_to_q31_3] duration = 0.001 seconds
- PASS - [support_f32.test_arm_float_to_q31_8] duration = 0.001 seconds
- PASS - [support_f32.test_arm_float_to_q7_15] duration = 0.001 seconds
- PASS - [support_f32.test_arm_float_to_q7_32] duration = 0.001 seconds
- PASS - [support_f32.test_arm_float_to_q7_33] duration = 0.001 seconds
- PASS - [support_f32.test_arm_merge_sort_const_16] duration = 0.001 seconds
- PASS - [support_f32.test_arm_merge_sort_out_11] duration = 0.001 seconds
- PASS - [support_f32.test_arm_sort_const_bitonic_16] duration = 0.001 seconds
- PASS - [support_f32.test_arm_sort_const_bubble_16] duration = 0.001 seconds

Environment (please complete the following information):

• OS: (e.g. Linux )
• Toolchain (e.g Zephyr SDK)
• Commit SHA or Version used: zephyr-v3.5.0-1427-gc1a6cfdf9bd8

[hakehuang]

Also fails on mimxrt1170_evk_cm7 for zephyr-v3.5.0-1427-gc1a6cfdf9bd8