Describe the bug
Several bugs need to be fixed for the nRF53 SoC porting in Zephyr
peripheral macro definitions for CACHE and NVMC need to be corrected. Instead of directly referencing CACHE_S and NVMC_S macros (i.e. for secure domain), the NRF_CACHE and NRF_NVMC macros may be used directly. This has been addressed in nRFX, where the correct base peripheral addresses are generated based on the security domain of the image we are building.
DCDC support, present in the nRF51 and nRF52 series of SoC/Boards, is a default nRF board feature, however, is missing for nRF53 and needs to be added so the nRF53-based Boards have the same set of default features.
Describe the bug Several bugs need to be fixed for the nRF53 SoC porting in Zephyr
peripheral macro definitions for CACHE and NVMC need to be corrected. Instead of directly referencing CACHE_S and NVMC_S macros (i.e. for secure domain), the NRF_CACHE and NRF_NVMC macros may be used directly. This has been addressed in nRFX, where the correct base peripheral addresses are generated based on the security domain of the image we are building.
DCDC support, present in the nRF51 and nRF52 series of SoC/Boards, is a default nRF board feature, however, is missing for nRF53 and needs to be added so the nRF53-based Boards have the same set of default features.