Closed stephanosio closed 2 years ago
cc @ioannisg @galak
Nice to do for next release
NOTE: Running STM32F405 Zephyr image on QEMU netduinoplus2
requires some (not upstreamed yet) patches:
https://lists.gnu.org/archive/html/qemu-devel/2020-02/msg07841.html https://lists.gnu.org/archive/html/qemu-devel/2020-02/msg07842.html
In summary, Zephyr links code and rodata in the flash at 0x8000000, which is aliased to 0x0. QEMU has a bug in which the ROM reset handler is executed after the CPU reset handler, and this causes the aliased memory data to be unavailable at the time of CPU vector table read and SP/PC initialisation- leading to boot failure.
NOTE: Running STM32F405 Zephyr image on QEMU netduinoplus2
requires some (not upstreamed yet) patches:
https://lists.gnu.org/archive/html/qemu-devel/2020-02/msg07841.html https://lists.gnu.org/archive/html/qemu-devel/2020-02/msg07842.html
In summary, Zephyr links code and rodata in the flash at 0x8000000, which is aliased to 0x0. QEMU has a bug in which the ROM reset handler is executed after the CPU reset handler, and this causes the aliased memory data to be unavailable at the time of CPU vector table read and SP/PC initialisation- leading to boot failure.
In addition, the STM32Cube driver used by Zephyr expects the RCC and FLASH peripheral registers, which are currently not emulated on the QEMU, to function properly. The following patches add emulation support for these two peripherals:
https://lists.gnu.org/archive/html/qemu-devel/2020-02/msg08453.html https://lists.gnu.org/archive/html/qemu-devel/2020-03/msg00001.html
@stephanosio are you still looking into that?
@ioannisg Have we managed to get an alternative for this? Or do we still need this?
@ioannisg Have we managed to get an alternative for this? Or do we still need this?
@stephanosio I have an open pr for qemu support on cortex-m33. So we will cover fpu testing on a slightly different ARCH though... Maybe worth keeping this open
@stephanosio I have an open pr for qemu support on cortex-m33. So we will cover fpu testing on a slightly different ARCH though... Maybe worth keeping this open
Comparing the QEMU emulation feature sets of Cortex-M4 and Cortex-M33:
Cortex-M4
set_feature(&cpu->env, ARM_FEATURE_V7);
set_feature(&cpu->env, ARM_FEATURE_M);
set_feature(&cpu->env, ARM_FEATURE_M_MAIN);
set_feature(&cpu->env, ARM_FEATURE_THUMB_DSP);
set_feature(&cpu->env, ARM_FEATURE_VFP4);
Cortex-M33
set_feature(&cpu->env, ARM_FEATURE_V8);
set_feature(&cpu->env, ARM_FEATURE_M);
set_feature(&cpu->env, ARM_FEATURE_M_MAIN);
set_feature(&cpu->env, ARM_FEATURE_M_SECURITY);
set_feature(&cpu->env, ARM_FEATURE_THUMB_DSP);
set_feature(&cpu->env, ARM_FEATURE_VFP4);
As far as the QEMU emulation goes, Cortex-M33F can be thought of as a simple superset of Cortex-M4F, and considering the main reason for adding M4F support was to facilitate Cortex-M floating point testing in Zephyr, I am not sure if there is any major advantage in adding M4F support alongside your planned M33 FP support.
I don't think there is anything Cortex-M4F emulation can offer that Cortex-M33F emulation cannot. Do you agree? @ioannisg
I don't think there is anything Cortex-M4F emulation can offer that Cortex-M33F emulation cannot. Do you agree? @ioannisg
What I was thinking of is the combination of FPU along with the (legacy) MPU architecture of Cortex-M4. If we care about that, we could only test it on M4F (or M7F), but not M33F.
What I was thinking of is the combination of FPU along with the (legacy) MPU architecture of Cortex-M4. If we care about that, we could only test it on M4F (or M7F), but not M33F.
In that case, I will look into resurrecting this PR.
Marking it low priority since #35381 already addresses the main problem at hand, which was lack of ARM hard FP testing in the CI.
Although #35381 introduced the mps2_an521_remote
target, which executes code on the CPU 1, a Cortex-M33F core that supports DSP and single-precision FPU, it has some limitations:
Its code memory is limited to 512K due to the TFM partitioning, which is not enough for some tests (e.g. CMSIS-DSP).
It does not support double precision FPU (Cortex-M33 core cannot be configured with double-precision support).
QEMU introduced the MPS2-AN386 machine type, which includes a Cortex-M4 core, so consider adding the support for it.
Also there exists MPS2-AN500, which includes a Cortex-M7 core, so consider adding it also in order to support double-precision coverage.
Closing this in favour of https://github.com/zephyrproject-rtos/zephyr/issues/45319
Currently, there is no emulated testing platform available for the floating point-capable ARM M-profile devices (i.e. Cortex-M4 and above).
Since the QEMU 5.0.0 will add the
netduinoplus2
machine, which emulates the STM32F405 SoC that embeds the Cortex-M4F core, once released and integrated into the Zephyr SDK, add theqemu_cortex_m4
to serve as the primary testing platform for the ARMv7-M devices.~In addition, once we add
qemu_cortex_m4
, removeqemu_cortex_m3
asqemu_cortex_m4
is a superset of it andmps2_an385
already serves as the default testing platform for the Cortex-M3 devices.~~Instead of removing
qemu_cortex_m3
, make it the default MPU/FPU-less testing platform and makeqemu_cortex_m4
the default MPU+FPU(+DSP) testing platform. In addition, phase outmps2_an385
as the default testing platform, since both MPU-less and MPU-ful test cases will be covered byqemu_cortex_m3
andqemu_cortex_m4
, respectively.~ Keepmps2_an385
as the default testing platform since its test coverage is better compared toqemu_cortex_m3
(305 vs 261, respectively).Notes:
netduinoplus2
board definition: https://github.com/qemu/qemu/blob/971b2a1e5b1a8cc8f597ac5d7016908f9fa880de/hw/arm/netduinoplus2.c