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Primary Git Repository for the Zephyr Project. Zephyr is a new generation, scalable, optimized, secure RTOS for multiple hardware architectures.
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I2C High-Speed Mode is not implemented #2971

Closed zephyrbot closed 6 years ago

zephyrbot commented 7 years ago

Reported by Sergey Arkhipov:

Function qm_i2c_set_config() in qm_i2c.c has only partial implementation for the Fast Plus (1 Mbps) mode configuration. Function qm_i2c_set_speed() sets the same values both for Fast (400 Kbps) and Fast Plus (1 Mbps) modes.

(Imported from Jira ZEP-1504)

zephyrbot commented 7 years ago

by punit vara:

There are only two possibility in I2C_CON register.Please have a look at page 148.

http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/quark-d2000-datasheet.pdf

There are of course three modes mentioned in this data sheet as well. Should I look for any underlying info to solve this Jira ?

zephyrbot commented 7 years ago

by punit vara:

I have got some info here(Page 253):

http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/quark-c1000-datasheet.pdf

Let me try to solve this issue

zephyrbot commented 7 years ago

by Sergey Arkhipov:

Yeah, Quark D2000 differs in this respect from Quark C1000. C1000 does allow us to select all three I2C speed modes.

zephyrbot commented 7 years ago

by Sergey Arkhipov:

It looks like Intel Quark SE Microcontroller C1000 datasheet (Document Number: 334712-004EN) contains very inconsistent info regarding I2C modes of operation. On page 242 there are 3 modes noted as being supported: SM (100Kb/s), FM (400 Kb/s), FM+ (1 Mb/s). But on page 253 there is a description of bits which are used to set the speed: standard mode (100 kbit/s), fast mode (400 kbit/s) and high-speed mode (3.4 Mbit/s). The datasheet does not explicitly explain how to set up FM+ mode. It can be assumed though that both FM and FM+ modes are selected with the same fast mode (400 kbit/s) setting and further configuration is achieved via SCL High/Low Count settings. That’s how it is done in the current driver revision. So this issue should be renamed to ‘I2C High-Speed Mode is not implemented’ but, again, it is not quite clear whether this mode is supported in real hardware though it is mentioned in datasheet. Hopefully, Intel will clarify it in the next datasheet revision.

zephyrbot commented 7 years ago

by punit vara:

Yeah. So should I rename my commit as high speed mode implemented and replace fast plus mode with high speed mode ? I think whatever changes I sent will be useful to enable high speed mode. I would kindly like to know you opinion about it. May be we can wait for next revision of data sheet I guess

zephyrbot commented 7 years ago

by Sergey Arkhipov:

It's better wait as we don't know for sure whether High-Speed Mode is there...

zephyrbot commented 7 years ago

by Mark Linkmeyer:

Correcting the priority field

zephyrbot commented 7 years ago

by Mark Linkmeyer:

Hi punit vara . Are you actively working on this bug? If so, please move it to In Progress to indicate such. If you're not working on it, is there anything blocking you that you could use help on? Let me know and we'll get you help. Thx.

zephyrbot commented 7 years ago

by punit vara:

Hi Mark Linkmeyer . According to Sergey Its not quite clear whether high speed mode is supported or not in real hardware although it is mentioned in datasheet. I have gone through data sheet and sent a patch accordingly but can you please help to confirm once whether high speed mode is supported in real hardware or not ? If yes I will send the patch once again with updated modification.

zephyrbot commented 7 years ago

by Kuo-Lang Tseng:

Sergio Rodriguez worked on I2C shim driver earlier and he may be able to help give some answer to whether high speed mode is supported by the SoC or not.