Closed yerabolu closed 3 years ago
@scottwcpg: Any update on this?
SPI test passed on my board. Please check the SPI flash part is a Winbond W25Q128 with JEDEC ID that matches the JEDEC ID hard coded in the test: 0x001840ef. If you are loading the Zephyr test app from the same SPI flash as the test then it should be able to read JEDEC ID. For quad you must make sure the jumpers for SHD_IO2 and SHD_IO3 are correct: SHD_IO2 JP98 connect 8-9 SHD_IO3 JP98 connect 11-12
I2C_API test requires additional jumper settings: JP54 1-2 connected supplies +3.3V to PCA9555 Test uses I2C address 0x26 for PCA9555 requiring: JP53 1-2 connected sets PCA9555 I2C address A0=0 JP53 3-4 unconnected sets PCA9555 I2C address A1=1 JP53 5-6 unconnected sets PCA9555 I2C address A2=1
Have not looked at GPIO test
GPIO falling edge test failure cause by HW firing the interrupt when the GPIO value is low and the interrupt detect mode changed from disabled to falling edge. I would classify this as a HW bug because it is acting like level low triggered. An hack for the test is to add clearing of cb_count and cb_count_expected before the for loop in test_gpio_pin_interrupt_edge. This allows both failing GPIO tests to pass but it is a race condition. It only works if the spurious ISR fires before clearing the variables the second time.
@yerabolu Please review the above debug results
@scottwcpg: will look into it and get back to you.
@scottwcpg: Verified the jumper settings for SPI and I2C_API. All the settings are as you mentioned above and tests are passing now on my setup as well.
But the GPIO tests are still failing. If the hack causes a race condition, should we look at the test to see if there is another way to test it?
@yerabolu All I can think of is to add delay in the test after enabling the GPIO interrupt, check the globals the ISR uses, if they are set clear them and proceed to the loop. If the delay is several hundred milliseconds that should be longer than the RC time constant of the pin load. But are there cases with other chips if the ISR fires before the test loop a real error should be reported?
@yerabolu All I can think of is to add delay in the test after enabling the GPIO interrupt, check the globals the ISR uses, if they are set clear them and proceed to the loop. If the delay is several hundred milliseconds that should be longer than the RC time constant of the pin load. But are there cases with other chips if the ISR fires before the test loop a real error should be reported?
@scottwcpg: Not sure if there are any other cases. Trying to investigate further.
@yerabolu could you clarify if this affects Zephyr 2.5 onwards or only the main branch? I'm asking since traces indicate Booting Zephyr OS build zephyr-v2.5.0-2839-gb504f8b6a27b
Do you have any bisection data? i.e. do we know if anything pointing to any recent changes to gpio/qspi driver or related tests?
@yerabolu could you clarify if this affects Zephyr 2.5 onwards or only the main branch? I'm asking since traces indicate Booting Zephyr OS build zephyr-v2.5.0-2839-gb504f8b6a27b
Do you have any bisection data? i.e. do we know if anything pointing to any recent changes to gpio/qspi driver or related tests?
@albertofloyd : It is observed on the main branch as well. Test started failing after this commit 5e1502e.
Thanks @yerabolu, seems this doesn't affect Zephyr 2.5 release but only Zephyr 2.6 and onwards (based solely on that commit inclusion info). @scottwcpg I recall you mention latest a HAL change required a pinmux driver update, is this the HAL update you were referring?
If so is the pinmux driver update in place?
@yerabolu All I can think of is to add delay in the test after enabling the GPIO interrupt, check the globals the ISR uses, if they are set clear them and proceed to the loop. If the delay is several hundred milliseconds that should be longer than the RC time constant of the pin load. But are there cases with other chips if the ISR fires before the test loop a real error should be reported?
@scottwcpg: Not sure if there are any other cases. Trying to investigate further.
@scottwcpg: Tried investigating and not sure if this helps - only mps2_an385, mps2_an521 platforms are excluded for this test. And test passes on other platforms. It is failing on Microchip.
@scottwcpg Any updates about that problem?
@maksimmasalski I added a fix to the GPIO driver in PR 37138 and added you as a reviewer. The fix worked on my MEC152x EVB.
@maksimmasalski I added a fix to the GPIO driver in PR 37138 and added you as a reviewer. The fix worked on my MEC152x EVB.
Thank you, Scott. Will review it.
@nashif how do we get this backported to v2.6?
@scottwcpg could you confirm what are the actual dependencies for this fix? https://github.com/zephyrproject-rtos/zephyr/pull/37479 mentions PR's 37138 and 37139.
@albertofloyd PR #37479 is the final fix for both MEC152x and MEC172x. Previous PR's using DMB() were not a long term solution.
@nashif seems like it was not backported to the 2.6. @scottwcpg could you backport it to 2.6? If not, I will backport.
Describe the bug Multiple tests are failing on mec15xxevb_assy6853 board under tests/boards/mec15xxevb_assy6853/qspi/ , i2c_api/ and tests/drivers/gpio/gpio_api_1pin/
To Reproduce Steps to reproduce the behavior:
Expected behavior All the tests should pass
Logs and console output
Environment (please complete the following information):
Additional context Tests were passing before, after bisecting tests started failing after this commit: 5e1502e816d7e33cf104ac526f6567f966b169f8