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zephyrproject-rtos / zephyr

Primary Git Repository for the Zephyr Project. Zephyr is a new generation, scalable, optimized, secure RTOS for multiple hardware architectures.
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Update CMSIS-DSP version to 1.9.0 (CMSIS 5.8.0) #37694

Closed stephanosio closed 3 years ago

stephanosio commented 3 years ago

Update CMSIS-DSP version to 1.9.0 (part of CMSIS 5.8.0 release).

TODO

stephanosio commented 3 years ago

NOTE: CMSIS-DSP 1.9.0 is required to support MVE with GCC, so any MVE support-related PRs should be submitted after this:

/opt/zephyr-sdk-0.13.0/arm-zephyr-eabi/lib/gcc/arm-zephyr-eabi/10.3.0/include/arm_mve.h:13020:76: note: expected 'uint32x4_ ' but argument is of type 'q31x4_t' {aka 'int32x4_t'}
13020 | __arm_vldrwq_gather_shifted_offset_s32 (int32_t const * __base, uint32x4_t __offset)
      |                                                                 ~~~~~~~~~~~^~~~~~~~
/home/stephanos/Dev/zephyrproject/modules/hal/cmsis/CMSIS/DSP/Include/arm_helium_utils.h: In function 'FAST_VSQRT_Q15':
/home/stephanos/Dev/zephyrproject/modules/hal/cmsis/CMSIS/DSP/Include/arm_helium_utils.h:298:63: error: incompatible type for argument 2 of '__arm_vldrhq_gather_shifted_offset_s16'
  298 |     vecTmp0 = vldrhq_gather_shifted_offset_s16(sqrtTable_Q15, vecIdx);
      |                                                               ^~~~~~
      |                                                               |
      |                                                               q15x8_t {aka int16x8_t}

https://github.com/ARM-software/CMSIS_5/blob/13b9f72f212688d2306d0d085d87cbb4bf9e5d3f/CMSIS/DSP/Include/arm_helium_utils.h#L699

stephanosio commented 3 years ago

Re: Half-precision floating-point support

On ARM and AArch64 targets, GCC supports half-precision (16-bit) floating point via the __fp16 type defined in the ARM C Language Extensions. On ARM systems, you must enable this type explicitly with the -mfp16-format command-line option in order to use it.

Specifying -mfp16-format=ieee selects the IEEE 754-2008 format. This format can represent normalized values in the range of 2^{-14} to 65504. There are 11 bits of significand precision, approximately 3 decimal digits.

Specifying -mfp16-format=alternative selects the ARM alternative format. This representation is similar to the IEEE format, but does not support infinities or NaNs. Instead, the range of exponents is extended, so that this format can represent normalized values in the range of 2^{-14} to 131008.

The GCC port for AArch64 only supports the IEEE 754-2008 format, and does not require use of the -mfp16-format command-line option.

Language-level support for the fp16 data type is independent of whether GCC generates code using hardware floating-point instructions. **In cases where hardware support is not specified, GCC implements conversions between fp16 and other types as library calls.**

https://gcc.gnu.org/onlinedocs/gcc/Half-Precision.html

For CMSIS-side float16_t definition, refer to the following: https://github.com/ARM-software/CMSIS_5/blob/347ca08b52808350c6328cd6a28f42f75dcddaad/CMSIS/DSP/Include/arm_math_types_f16.h#L54-L57

stephanosio commented 3 years ago

NOTE: CMSIS-DSP 1.9.0 adds many new FP16 functions and explicitly makes FP16 an optional feature. Our configs should be updated to do that. => Added CMSIS_DSP_FLOAT16 config.

stephanosio commented 3 years ago

NOTE: QEMU emulation of mps3_an547 does not seem to properly support the MVE instructions ("undefined instruction" fault is generated when executing MVE instructions). The tests work when running with ARM FVP, so disable testing on mps3_an547 with QEMU for now.

MVE is currently disabled for Cortex-M55 emulation in QEMU: https://github.com/qemu/qemu/blob/beb191385882a2a283ce777d76b1a77e71813d14/target/arm/cpu_tcg.c#L657-L660

MVE emulation will be added in the QEMU 6.2 release: https://www.mail-archive.com/qemu-devel@nongnu.org/msg827164.html