Closed mckaymatthew closed 2 years ago
Update: It appears the register definitions in litex_timer.c are incorrect, and the system is never getting a sys_clock_announce.
Register definition errors are present in eth_litex.c as well
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Describe the bug Calling k_msleep never returns on litex_vexriscv hardware using colorlighti5 Lattice board.
To Reproduce Steps to reproduce the behavior:
uint32_t ctr = 0; while(1) { printk("Hello World! %u\n",ctr++); k_msleep(1); }
python3 ./colorlight_i5.py --build --csr-csv test/csr.csv --csr-json test/csr.json
litex/litex/tools/litex_json2dts_zephyr.py --dts overlay.dts --config overlay.config csr.json
west build -b litex_vexriscv samples/hello_world --pristine -DDTC_OVERLAY_FILE=/Users/user/project/litex/litex-boards/litex_boards/targets/test/overlay.dts -DCONFIG_UART_LITEUART=y -DCONFIG_LITEX_TIMER=y -DCONFIG_ETH_LITEETH=n -DCONFIG_SPI_LITESPI=n -DCONFIG_I2C_LITEX=n
ecpdap program --freq 5000 colorlight_i5/gateware/colorlight_i5.bit
./litex_term.py --serial-boot --kernel /Users/user/project/zephyrproject/zephyr/build/zephyr/zephyr.bin /dev/cu.usbmodem142401
Expected behavior A clear and concise description of what you expected to happen.
Impact Showstopper.
Logs and console output Adding some printk debugging, arch_swap is never returning when called in z_swap_irqlock
Zephyr console On main/head
On 2.7.0-rc1
Build logs from zephyr:
Environment (please complete the following information):