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zephyrproject-rtos / zephyr

Primary Git Repository for the Zephyr Project. Zephyr is a new generation, scalable, optimized, secure RTOS for multiple hardware architectures.
https://docs.zephyrproject.org
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Support for CH32V307 devices #43940

Closed Mango-kid closed 2 years ago

Mango-kid commented 2 years ago

This Issue is for adding support for the ch32v307 series devices. This is a very interesting IoT CPU and has an integrated 10M ethernet PHY.

I am currently working on a dev board for the ch32v307 that would allow for easy and low cost real-time ethernet applications.

I am willing to maintain support for this new SOC. I am experienced with general embedded system development but this is my first time doing anything major for adding support for an SOC on Zephyr, so any help with a plan of attack would be great.

Also if anyone is willing to work with me and/or validate any PR, I would be happy to provide hardware for testing.

Additional context There is already some peripheral support on github, but it seems very similar to the ST HAL drivers and I think there may be some controversy surrounding the licensing in the HAL. But I am also assuming that the HAL would not be used directly in Zephyr.

CH32V307 Github

github-actions[bot] commented 2 years ago

This issue has been marked as stale because it has been open (more than) 60 days with no activity. Remove the stale label or add a comment saying that you would like to have the label removed otherwise this issue will automatically be closed in 14 days. Note, that you can always re-open a closed issue at any time.

fdarling commented 2 years ago

I can't find any mention of support for the CH32V307 other than in the release notes referring to this issue. Are any of the peripherals supported? I am interested specifically in Ethernet...

str4t0m commented 2 years ago

No, currently the CH32V307 is not supported at the moment. Also, no MCU from WCH is supported yet, but any contributions are welcome.

dragonlock2 commented 7 months ago

This might be a step in the right direction, I was adding CH32X035 support which uses a similar core. Based on the non-standard way CH32 handles interrupts, I had to do a workaround documented here zephyrboards/soc/riscv/wch_ch32/common/irq.c. Not sure I want to try mainlining it due to how hacky it feels 😅