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zephyrproject-rtos / zephyr

Primary Git Repository for the Zephyr Project. Zephyr is a new generation, scalable, optimized, secure RTOS for multiple hardware architectures.
https://docs.zephyrproject.org
Apache License 2.0
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ESP32-C3 not displaying "hello world!" #57696

Closed Ananyaaynana closed 1 year ago

Ananyaaynana commented 1 year ago

I am using the zephyr sample application from github to understand the zephyr RTOS. I modified the main.c to "Hello world!" on ESP32-C3. `/*

include <zephyr/kernel.h>

void main(void) { printk("Hello World! %s\n", CONFIG_BOARD); }`

To add the ESP32-C3 files such as hal_espressif and stm32 to my sample-application I modified the west.yml in the my-workspace2/example-application directory:

`# Copyright (c) 2021 Nordic Semiconductor ASA

manifest: self: west-commands: scripts/west-commands.yml

remotes:

The prj.conf file is as follows: ` CONFIG_ZSL=y CONFIG_CPLUSPLUS=y CONFIG_LIB_CPLUSPLUS=y

CONFIG_NEWLIB_LIBC=y CONFIG_NEWLIB_LIBC_FLOAT_PRINTF=y

CONFIG_THREAD_NAME=y

CONFIG_REBOOT=y

CONFIG_EVENTS=y CONFIG_HWINFO=y

CONFIG_LOG=y CONFIG_LOG_MODE_MINIMAL=y

CONFIG_SOC_ESP32C3=y CONFIG_CONSOLE=y CONFIG_SERIAL=y CONFIG_UART_CONSOLE=y CONFIG_UART_INTERRUPT_DRIVEN=y

CONFIG_I2C=y

CONFIG_CAN=y CONFIG_ISOTP=y

CONFIG_MPU_ALLOW_FLASH_WRITE=y CONFIG_FLASH=y CONFIG_NVS=y CONFIG_NVS_LOG_LEVEL_WRN=y

CONFIG_HEAP_MEM_POOL_SIZE=256`

On using the command: 'west build -p always -b esp32c3_devkitm' I get this output: 'Successfully created esp32c3 image.' On using the command: 'west flash' It successfully flashes the board. On using the command: 'west espressif monitor' I get this output: 'Serial port /dev/ttyACM0 Connecting... Detecting chip type... ESP32-C3 --- idf_monitor on /dev/ttyACM0 115200 --- --- Quit: Ctrl+] | Menu: Ctrl+T | Help: Ctrl+T followed by Ctrl+H --- ESP-ROM:esp32c3-api1-20210207 Build:Feb 7 2021 rst:0x15 (USB_UART_CHIP_RESET),boot:0xd (SPI_FAST_FLASH_BOOT) Saved PC:0x4004c72e SPIWP:0xee mode:DIO, clock div:2 load:0x3fcd6100,len:0x15e4 load:0x403ce000,len:0x920 load:0x403d0000,len:0x2c4c SHA-256 comparison failed: Calculated: ef87cfdec265a07b25472fe640fecfdfeb534e303a436fe7e58bb2eb7ad82fe0 Expected: ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff Attempting to boot anyway... entry 0x403ce000 I (43) boot: ESP-IDF 0b5aa325a 2nd stage bootloader I (43) boot: compile time 16:46:18 I (43) boot: chip revision: 3 I (45) boot.esp32c3: SPI Speed : 40MHz I (49) boot.esp32c3: SPI Mode : DIO I (54) boot.esp32c3: SPI Flash Size : 4MB I (59) boot: Enabling RNG early entropy source... I (64) boot: Partition Table: I (68) boot: ## Label Usage Type ST Offset Length I (75) boot: 0 nvs WiFi data 01 02 00009000 00006000 I (83) boot: 1 phy_init RF data 01 01 0000f000 00001000 I (90) boot: 2 factory factory app 00 00 00010000 00100000 I (98) boot: End of partition table I (102) esp_image: segment 0: paddr=00010020 vaddr=00000020 size=0001ch ( 28) I (110) esp_image: segment 1: paddr=00010044 vaddr=3fc89b00 size=009a8h ( 2472) load I (119) esp_image: segment 2: paddr=000109f4 vaddr=3fc8a4a8 size=0030ch ( 780) load I (127) esp_image: segment 3: paddr=00010d08 vaddr=40380000 size=07df8h ( 32248) load I (143) esp_image: segment 4: paddr=00018b08 vaddr=00000000 size=07530h ( 30000) I (150) esp_image: segment 5: paddr=00020040 vaddr=3c000040 size=016e0h ( 5856) map I (153) esp_image: segment 6: paddr=00021728 vaddr=00000000 size=0e8f0h ( 59632) I (173) esp_image: segment 7: paddr=00030020 vaddr=42010020 size=04178h ( 16760) map I (180) boot: Loaded app from partition at offset 0x10000

'

Expected output is:

'I (43) boot: ESP-IDF 0b5aa325a 2nd stage bootloader I (43) boot: compile time 16:46:18 I (43) boot: chip revision: 3 I (45) boot.esp32c3: SPI Speed : 40MHz I (49) boot.esp32c3: SPI Mode : DIO I (54) boot.esp32c3: SPI Flash Size : 4MB I (59) boot: Enabling RNG early entropy source... I (64) boot: Partition Table: I (68) boot: ## Label Usage Type ST Offset Length I (75) boot: 0 nvs WiFi data 01 02 00009000 00006000 I (83) boot: 1 phy_init RF data 01 01 0000f000 00001000 I (90) boot: 2 factory factory app 00 00 00010000 00100000 I (98) boot: End of partition table I (102) esp_image: segment 0: paddr=00010020 vaddr=00000020 size=0001ch ( 28) I (110) esp_image: segment 1: paddr=00010044 vaddr=3fc89b00 size=009a8h ( 2472) load I (119) esp_image: segment 2: paddr=000109f4 vaddr=3fc8a4a8 size=0030ch ( 780) load I (127) esp_image: segment 3: paddr=00010d08 vaddr=40380000 size=07df8h ( 32248) load I (143) esp_image: segment 4: paddr=00018b08 vaddr=00000000 size=07530h ( 30000) I (150) esp_image: segment 5: paddr=00020040 vaddr=3c000040 size=016e0h ( 5856) map I (153) esp_image: segment 6: paddr=00021728 vaddr=00000000 size=0e8f0h ( 59632) I (173) esp_image: segment 7: paddr=00030020 vaddr=42010020 size=04178h ( 16760) map I (180) boot: Loaded app from partition at offset 0x10000 Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx Hello World! esp32 '

Impact Not able to proceed further.

Logs (.venv) ananya@ananya-Latitude-7480:~/my-workspace2/example-application/app$west build -p always -b esp32c3_devkitm -- west build: making build dir /home/ananya/my-workspace2/example-application/app/build pristine -- west build: generating a build system Loading Zephyr default modules (Zephyr base). -- Application: /home/ananya/my-workspace2/example-application/app -- CMake version: 3.26.3 -- Found Python3: /home/ananya/zephyrproject/.venv/bin/python3.10 (found suitable exact version "3.10.6") found components: Interpreter -- Cache files will be written to: /home/ananya/.cache/zephyr -- Zephyr version: 3.3.99 (/home/ananya/my-workspace2/zephyr) -- Found west (found suitable version "1.0.0", minimum required is "0.7.1") -- Board: esp32c3_devkitm -- ZEPHYR_TOOLCHAIN_VARIANT not set, trying to locate Zephyr SDK -- Found host-tools: zephyr 0.15.2 (/home/ananya/zephyr-sdk-0.15.2) -- Found toolchain: zephyr 0.15.2 (/home/ananya/zephyr-sdk-0.15.2) -- Found Dtc: /home/ananya/zephyr-sdk-0.15.2/sysroots/x86_64-pokysdk-linux/usr/bin/dtc (found suitable version "1.6.0", minimum required is "1.4.6") -- Found BOARD.dts: /home/ananya/my-workspace2/zephyr/boards/riscv/esp32c3_devkitm/esp32c3_devkitm.dts -- Generated zephyr.dts: /home/ananya/my-workspace2/example-application/app/build/zephyr/zephyr.dts -- Generated devicetree_generated.h: /home/ananya/my-workspace2/example-application/app/build/zephyr/include/generated/devicetree_generated.h -- Including generated dts.cmake file: /home/ananya/my-workspace2/example-application/app/build/zephyr/dts.cmake

warning: Deprecated symbol CPLUSPLUS is enabled.

warning: Deprecated symbol LIB_CPLUSPLUS is enabled.

Parsing /home/ananya/my-workspace2/example-application/app/Kconfig Loaded configuration '/home/ananya/my-workspace2/zephyr/boards/riscv/esp32c3_devkitm/esp32c3_devkitm_defconfig' Merged configuration '/home/ananya/my-workspace2/example-application/app/prj.conf' Configuration saved to '/home/ananya/my-workspace2/example-application/app/build/zephyr/.config' Kconfig header saved to '/home/ananya/my-workspace2/example-application/app/build/zephyr/include/generated/autoconf.h' -- Found GnuLd: /home/ananya/zephyr-sdk-0.15.2/riscv64-zephyr-elf/bin/../lib/gcc/riscv64-zephyr-elf/12.1.0/../../../../riscv64-zephyr-elf/bin/ld.bfd (found version "2.38") -- The C compiler identification is GNU 12.1.0 -- The CXX compiler identification is GNU 12.1.0 -- The ASM compiler identification is GNU -- Found assembler: /home/ananya/zephyr-sdk-0.15.2/riscv64-zephyr-elf/bin/riscv64-zephyr-elf-gcc -- Configuring done (3.0s) -- Generating done (0.1s) -- Build files have been written to: /home/ananya/my-workspace2/example-application/app/build -- west build: building application [1/247] Preparing syscall dependency handling

[9/247] Generating include/generated/version.h -- Zephyr version: 3.3.99 (/home/ananya/my-workspace2/zephyr), build: zephyr-v3.3.0-3642-g3e6bf0359bc6 [48/247] Performing configure step for 'EspIdfBootloader' -- Found Git: /usr/bin/git (found version "2.34.1") -- The C compiler identification is GNU 12.1.0 -- The CXX compiler identification is GNU 12.1.0 -- The ASM compiler identification is GNU -- Found assembler: /home/ananya/zephyr-sdk-0.15.2/riscv64-zephyr-elf/bin/riscv64-zephyr-elf-gcc -- Detecting C compiler ABI info -- Detecting C compiler ABI info - done -- Check for working C compiler: /home/ananya/zephyr-sdk-0.15.2/riscv64-zephyr-elf/bin/riscv64-zephyr-elf-gcc - skipped -- Detecting C compile features -- Detecting C compile features - done -- Detecting CXX compiler ABI info -- Detecting CXX compiler ABI info - done -- Check for working CXX compiler: /home/ananya/zephyr-sdk-0.15.2/riscv64-zephyr-elf/bin/riscv64-zephyr-elf-g++ - skipped -- Detecting CXX compile features -- Detecting CXX compile features - done -- Building ESP-IDF components for target esp32c3 -- Project sdkconfig file /home/ananya/my-workspace2/example-application/app/build/esp-idf/build/sdkconfig -- Adding linker script /home/ananya/my-workspace2/modules/hal/espressif/components/soc/esp32c3/ld/esp32c3.peripherals.ld -- Adding linker script /home/ananya/my-workspace2/modules/hal/espressif/components/esp_rom/esp32c3/ld/esp32c3.rom.ld -- Adding linker script /home/ananya/my-workspace2/modules/hal/espressif/components/esp_rom/esp32c3/ld/esp32c3.rom.api.ld -- Adding linker script /home/ananya/my-workspace2/modules/hal/espressif/components/esp_rom/esp32c3/ld/esp32c3.rom.libgcc.ld -- Adding linker script /home/ananya/my-workspace2/modules/hal/espressif/components/esp_rom/esp32c3/ld/esp32c3.rom.newlib.ld -- Adding linker script /home/ananya/my-workspace2/modules/hal/espressif/components/bootloader/subproject/main/ld/esp32c3/bootloader.ld -- Adding linker script /home/ananya/my-workspace2/modules/hal/espressif/components/bootloader/subproject/main/ld/esp32c3/bootloader.rom.ld -- Components: bootloader bootloader_support efuse esp32c3 esp_common esp_hw_support esp_rom esp_system esptool_py freertos hal log main micro-ecc newlib partition_table riscv soc spi_flash -- Component paths: /home/ananya/my-workspace2/modules/hal/espressif/components/bootloader /home/ananya/my-workspace2/modules/hal/espressif/components/bootloader_support /home/ananya/my-workspace2/modules/hal/espressif/components/efuse /home/ananya/my-workspace2/modules/hal/espressif/components/esp32c3 /home/ananya/my-workspace2/modules/hal/espressif/components/esp_common /home/ananya/my-workspace2/modules/hal/espressif/components/esp_hw_support /home/ananya/my-workspace2/modules/hal/espressif/components/esp_rom /home/ananya/my-workspace2/modules/hal/espressif/components/esp_system /home/ananya/my-workspace2/modules/hal/espressif/components/esptool_py /home/ananya/my-workspace2/modules/hal/espressif/components/freertos /home/ananya/my-workspace2/modules/hal/espressif/components/hal /home/ananya/my-workspace2/modules/hal/espressif/components/log /home/ananya/my-workspace2/modules/hal/espressif/components/bootloader/subproject/main /home/ananya/my-workspace2/modules/hal/espressif/components/bootloader/subproject/components/micro-ecc /home/ananya/my-workspace2/modules/hal/espressif/components/newlib /home/ananya/my-workspace2/modules/hal/espressif/components/partition_table /home/ananya/my-workspace2/modules/hal/espressif/components/riscv /home/ananya/my-workspace2/modules/hal/espressif/components/soc /home/ananya/my-workspace2/modules/hal/espressif/components/spi_flash -- Configuring done (2.1s) -- Generating done (0.1s) -- Build files have been written to: /home/ananya/my-workspace2/example-application/app/build/esp-idf/build/bootloader [166/247] Performing build step for 'EspIdfBootloader' [1/88] Generating project_elf_src_esp32c3.c [2/88] Building C object esp-idf/soc/CMakeFiles/idf_soc.dir/lldesc.c.obj [3/88] Building C object CMakeFiles/bootloader.elf.dir/project_elf_src_esp32c3.c.obj [4/88] Building C object esp-idf/soc/CMakeFiles/idf_soc.dir/soc_include_legacy_warn.c.obj [5/88] Building C object esp-idf/hal/CMakeFiles/idf_hal.dir/mpu_hal.c.obj [6/88] Building C object esp-idf/soc/CMakeFiles/idf_soc.dir/esp32c3/adc_periph.c.obj [7/88] Building C object esp-idf/soc/CMakeFiles/idf_soc.dir/esp32c3/dedic_gpio_periph.c.obj [8/88] Building C object esp-idf/soc/CMakeFiles/idf_soc.dir/esp32c3/gdma_periph.c.obj [9/88] Building C object esp-idf/soc/CMakeFiles/idf_soc.dir/esp32c3/interrupts.c.obj [10/88] Building C object esp-idf/hal/CMakeFiles/idf_hal.dir/cpu_hal.c.obj [11/88] Building C object esp-idf/soc/CMakeFiles/idf_soc.dir/esp32c3/spi_periph.c.obj [12/88] Building C object esp-idf/soc/CMakeFiles/idf_soc.dir/esp32c3/gpio_periph.c.obj [13/88] Building C object esp-idf/soc/CMakeFiles/idf_soc.dir/esp32c3/rmt_periph.c.obj [14/88] Building C object esp-idf/soc/CMakeFiles/idf_soc.dir/esp32c3/ledc_periph.c.obj [15/88] Building C object esp-idf/soc/CMakeFiles/idf_soc.dir/esp32c3/sigmadelta_periph.c.obj [16/88] Building C object esp-idf/soc/CMakeFiles/idf_soc.dir/esp32c3/i2s_periph.c.obj [17/88] Building C object esp-idf/hal/CMakeFiles/idf_hal.dir/wdt_hal_iram.c.obj [18/88] Building C object esp-idf/soc/CMakeFiles/idf_soc.dir/esp32c3/uart_periph.c.obj [19/88] Building C object esp-idf/soc/CMakeFiles/idf_soc.dir/esp32c3/i2c_periph.c.obj [20/88] Building C object esp-idf/soc/CMakeFiles/__idf_soc.dir/esp32c3/timer_periph.c.obj [21/88] Building C object esp-idf/spi_flash/CMakeFiles/idf_spi_flash.dir/esp32c3/spi_flash_rom_patch.c.obj [22/88] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/bootloader_clock_init.c.obj [23/88] Building C object esp-idf/esp_hw_support/CMakeFiles/idf_esp_hw_support.dir/port/esp32c3/rtc_time.c.obj [24/88] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/bootloader_mem.c.obj [25/88] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/bootloader_common_loader.c.obj [26/88] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/bootloader_random.c.obj [27/88] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/bootloader_flash.c.obj [28/88] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/bootloader_common.c.obj [29/88] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/bootloader_random_esp32c3.c.obj [30/88] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/flash_encrypt.c.obj [31/88] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/flash_partitions.c.obj [32/88] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/secure_boot.c.obj [33/88] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/bootloader_efuse_esp32c3.c.obj [34/88] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/bootloader_utility.c.obj [35/88] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/flash_qio_mode.c.obj [36/88] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/bootloader_flash_config_esp32c3.c.obj [37/88] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/bootloader_clock_loader.c.obj [38/88] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/bootloader_init.c.obj [39/88] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/bootloader_console_loader.c.obj [40/88] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/bootloader_console.c.obj [41/88] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/esp32c3/bootloader_soc.c.obj [42/88] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/bootloader_panic.c.obj [43/88] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/esp32c3/bootloader_sha.c.obj [44/88] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/esp32c3/bootloader_esp32c3.c.obj [45/88] Building C object esp-idf/efuse/CMakeFiles/__idf_efuse.dir/esp32c3/esp_efuse_table.c.obj [46/88] Building C object esp-idf/efuse/CMakeFiles/idf_efuse.dir/esp32c3/esp_efuse_fields.c.obj [47/88] Building C object esp-idf/efuse/CMakeFiles/idf_efuse.dir/esp32c3/esp_efuse_rtc_calib.c.obj [48/88] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/esp_image_format.c.obj [49/88] Building C object esp-idf/efuse/CMakeFiles/idf_efuse.dir/esp32c3/esp_efuse_utility.c.obj [50/88] Building C object esp-idf/efuse/CMakeFiles/idf_efuse.dir/src/esp_efuse_api.c.obj [51/88] Building C object esp-idf/efuse/CMakeFiles/idf_efuse.dir/src/esp_efuse_fields.c.obj [52/88] Building C object esp-idf/esp_system/CMakeFiles/idf_esp_system.dir/esp_err.c.obj [53/88] Building C object esp-idf/esp_hw_support/CMakeFiles/idf_esp_hw_support.dir/compare_set.c.obj [54/88] Building C object esp-idf/esp_hw_support/CMakeFiles/idf_esp_hw_support.dir/cpu_util.c.obj [55/88] Building C object esp-idf/esp_hw_support/CMakeFiles/idf_esp_hw_support.dir/port/esp32c3/cpu_util_esp32c3.c.obj [56/88] Building C object esp-idf/efuse/CMakeFiles/__idf_efuse.dir/src/esp_efuse_utility.c.obj [57/88] Building C object esp-idf/efuse/CMakeFiles/idf_efuse.dir/src/esp_efuse_api_key_esp32xx.c.obj [58/88] Building C object esp-idf/esp_hw_support/CMakeFiles/idf_esp_hw_support.dir/port/esp32c3/rtc_clk_init.c.obj [59/88] Building C object esp-idf/esp_hw_support/CMakeFiles/idf_esp_hw_support.dir/port/esp32c3/rtc_pm.c.obj [60/88] Building C object esp-idf/esp_hw_support/CMakeFiles/idf_esp_hw_support.dir/port/esp32c3/rtc_sleep.c.obj [61/88] Building C object esp-idf/esp_hw_support/CMakeFiles/idf_esp_hw_support.dir/port/esp32c3/chip_info.c.obj [62/88] Building C object esp-idf/esp_hw_support/CMakeFiles/idf_esp_hw_support.dir/port/esp32c3/rtc_init.c.obj [63/88] Building C object esp-idf/esp_rom/CMakeFiles/idf_esp_rom.dir/patches/esp_rom_crc.c.obj [64/88] Building C object esp-idf/micro-ecc/CMakeFiles/idf_micro-ecc.dir/uECC_verify_antifault.c.obj [65/88] Building C object esp-idf/esp_rom/CMakeFiles/idf_esp_rom.dir/patches/esp_rom_sys.c.obj [66/88] Building C object esp-idf/esp_common/CMakeFiles/idf_esp_common.dir/src/esp_err_to_name.c.obj [67/88] Building C object esp-idf/esp_rom/CMakeFiles/idf_esp_rom.dir/patches/esp_rom_tjpgd.c.obj [68/88] Building C object esp-idf/esp_rom/CMakeFiles/idf_esp_rom.dir/patches/esp_rom_uart.c.obj [69/88] Building C object esp-idf/log/CMakeFiles/idf_log.dir/log_noos.c.obj [70/88] Building C object esp-idf/log/CMakeFiles/idf_log.dir/log_buffers.c.obj [71/88] Building C object esp-idf/esp_hw_support/CMakeFiles/idf_esp_hw_support.dir/port/esp32c3/rtc_clk.c.obj [72/88] Building C object esp-idf/log/CMakeFiles/__idf_log.dir/log.c.obj [73/88] Building C object esp-idf/main/CMakeFiles/__idf_main.dir/bootloader_start.c.obj [74/88] Linking C static library esp-idf/log/liblog.a [75/88] Linking C static library esp-idf/esp_rom/libesp_rom.a [76/88] Linking C static library esp-idf/esp_common/libesp_common.a [77/88] Linking C static library esp-idf/esp_hw_support/libesp_hw_support.a [78/88] Linking C static library esp-idf/esp_system/libesp_system.a [79/88] Linking C static library esp-idf/efuse/libefuse.a [80/88] Linking C static library esp-idf/bootloader_support/libbootloader_support.a [81/88] Linking C static library esp-idf/spi_flash/libspi_flash.a [82/88] Linking C static library esp-idf/micro-ecc/libmicro-ecc.a [83/88] Linking C static library esp-idf/soc/libsoc.a [84/88] Linking C static library esp-idf/hal/libhal.a [85/88] Linking C static library esp-idf/main/libmain.a [86/88] Linking C executable bootloader.elf [87/88] Generating binary image from built executable esptool.py v4.5 Creating esp32c3 image... Merged 1 ELF section Successfully created esp32c3 image. Generated /home/ananya/my-workspace2/example-application/app/build/esp-idf/build/bootloader/bootloader.bin [88/88] cd /home/ananya/my-workspace2/example-application/app/build/esp-idf/build/bootloader/esp-idf/esptool_py && /home/ananya/zephyrproject/.venv/bin/python3.10 /home/ananya/my-workspace2/modules/hal/espressif/components/partition_table/check_sizes.py --offset 0x8000 bootloader 0x0 /home/ananya/my-workspace2/example-application/app/build/esp-idf/build/bootloader/bootloader.bin Bootloader binary size 0x4b90 bytes. 0x3470 bytes (41%) free. [237/247] Linking C executable zephyr/zephyr_pre0.elf

[241/247] Linking C executable zephyr/zephyr_pre1.elf

[247/247] Linking C executable zephyr/zephyr.elf Memory region Used Size Region Size %age Used mcuboot_hdr: 32 B 32 B 100.00% metadata: 28 B 32 B 87.50% ROM: 58116 B 4194240 B 1.39% iram0_0_seg: 32256 B 320 KB 9.84% irom0_0_seg: 82296 B 4194272 B 1.96% drom0_0_seg: 5856 B 4194240 B 0.14% dram0_0_seg: 42932 B 320 KB 13.10% rtc_iram_seg: 0 GB 8 KB 0.00% IDT_LIST: 0 GB 8 KB 0.00% esptool.py v4.5 Creating esp32c3 image... Merged 10 ELF sections Successfully created esp32c3 image.

(.venv) ananya@ananya-Latitude-7480:~/my-workspace2/example-application/app$ west flash -- west flash: rebuilding ninja: no work to do. -- west flash: using runner esp32 -- runners.esp32: Flashing esp32 chip on None (921600bps) esptool.py v4.5 Found 1 serial ports Serial port /dev/ttyACM0 Connecting.... Detecting chip type... ESP32-C3 Chip is ESP32-C3 (revision v0.3) Features: WiFi, BLE Crystal is 40MHz MAC: 70:04:1d:10:ae:e8 Uploading stub... Running stub... Stub running... Changing baud rate to 921600 Changed. Configuring flash size... Auto-detected Flash size: 4MB Flash will be erased from 0x00000000 to 0x00004fff... Flash will be erased from 0x00008000 to 0x00008fff... Flash will be erased from 0x00010000 to 0x00034fff... Flash params set to 0x0220 Wrote 32768 bytes at 0x00000000 in 0.3 seconds (768.8 kbit/s)... Hash of data verified. Wrote 16384 bytes at 0x00008000 in 0.1 seconds (1390.5 kbit/s)... Hash of data verified. Wrote 163840 bytes at 0x00010000 in 1.3 seconds (972.6 kbit/s)... Hash of data verified.

Leaving... Hard resetting via RTS pin...

(.venv) ananya@ananya-Latitude-7480:~/my-workspace2/example-application/app$ west espressif monitor Serial port /dev/ttyACM0 Connecting... Detecting chip type... ESP32-C3 --- idf_monitor on /dev/ttyACM0 115200 --- --- Quit: Ctrl+] | Menu: Ctrl+T | Help: Ctrl+T followed by Ctrl+H --- ESP-ROM:esp32c3-api1-20210207 Build:Feb 7 2021 rst:0x15 (USB_UART_CHIP_RESET),boot:0xd (SPI_FAST_FLASH_BOOT) Saved PC:0x4004c72e SPIWP:0xee mode:DIO, clock div:2 load:0x3fcd6100,len:0x15e4 load:0x403ce000,len:0x920 load:0x403d0000,len:0x2c4c SHA-256 comparison failed: Calculated: ef87cfdec265a07b25472fe640fecfdfeb534e303a436fe7e58bb2eb7ad82fe0 Expected: ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff Attempting to boot anyway... entry 0x403ce000 I (43) boot: ESP-IDF 0b5aa325a 2nd stage bootloader I (43) boot: compile time 16:46:18 I (43) boot: chip revision: 3 I (45) boot.esp32c3: SPI Speed : 40MHz I (49) boot.esp32c3: SPI Mode : DIO I (54) boot.esp32c3: SPI Flash Size : 4MB I (59) boot: Enabling RNG early entropy source... I (64) boot: Partition Table: I (68) boot: ## Label Usage Type ST Offset Length I (75) boot: 0 nvs WiFi data 01 02 00009000 00006000 I (83) boot: 1 phy_init RF data 01 01 0000f000 00001000 I (90) boot: 2 factory factory app 00 00 00010000 00100000 I (98) boot: End of partition table I (102) esp_image: segment 0: paddr=00010020 vaddr=00000020 size=0001ch ( 28) I (110) esp_image: segment 1: paddr=00010044 vaddr=3fc89b00 size=009a8h ( 2472) load I (119) esp_image: segment 2: paddr=000109f4 vaddr=3fc8a4a8 size=0030ch ( 780) load I (127) esp_image: segment 3: paddr=00010d08 vaddr=40380000 size=07df8h ( 32248) load I (143) esp_image: segment 4: paddr=00018b08 vaddr=00000000 size=07530h ( 30000) I (150) esp_image: segment 5: paddr=00020040 vaddr=3c000040 size=016e0h ( 5856) map I (153) esp_image: segment 6: paddr=00021728 vaddr=00000000 size=0e8f0h ( 59632) I (173) esp_image: segment 7: paddr=00030020 vaddr=42010020 size=04178h ( 16760) map I (180) boot: Loaded app from partition at offset 0x10000

sylvioalves commented 1 year ago

@Ananyaaynana I have just tried samples/hello_world embeddding your configuration and it worked. What is the revision you've been working on? Have you run west update as well?

Ananyaaynana commented 1 year ago

I am using the v3.2-branch revision of zephyr. Yes I have run west update.

MrSuicideParrot commented 1 year ago

@Ananyaaynana could you share how did you solve this issue?

Ananyaaynana commented 1 year ago

@MrSuicideParrot I ran west update again.

alkurop commented 4 months ago

Hello. I also stumbled upon this issue of serial monitor. After some investigation, it appears that the uart port on Esp32c3 is desabled by default configuration.

To make my life easier, I used nrfConnect plugin for the VSCode. In there I can reconfigure tasks to build project and debug.

{
    "version": "2.0.0",
    "tasks": [
        {
            "label": "west build esp32c3",
            "type": "shell",
            "command": "west build -p always -b esp32c3_devkitm  ."
        },
        {
            "label": "west flash esp32c3",
            "type": "shell",
            "command": "west flash --esp-baud-rate 115200 --esp-device /dev/cu.usbmodem1114201 ;  west espressif monitor --p /dev/cu.usbmodem1114201 "

        },
    ]
}

And then click on the Flash and Build button and reconfigure to use tasks. Screenshot 2024-06-28 at 21 06 45

This nrf plugin has a very nice feature ViewDeviceTree. It is a gui to configure the esp32_....overlay. I played a little bit with the configuration, and it turned out that to enable the monitor output, there is a line of code that was added to the overlay. Screenshot 2024-06-28 at 21 13 45

&uart0 {
    zephyr,deferred-init;
};

Moreover, I'm now following nrf's tutorials - they are pretty useful in my case for a board Esp23C3, because nrf totally uses Zephyr. https://academy.nordicsemi.com/courses/nrf-connect-sdk-fundamentals/lessons/lesson-1-nrf-connect-sdk-introduction/topic/exercise-2-1/ The only difference is I have to tweak the overlay file for the Esp32C3 board.

sylvioalves commented 4 months ago

@alkurop which Zephyr revision (and SDK)?

alkurop commented 4 months ago

zephyr-sdk-0.16.1. I probably need to update to 16.8 I'm on master branch for the zephyrproject

sylvioalves commented 4 months ago

Can you paste the whole output and branch revision? I can successfully run that here:

[esp32c3] [INF] IROM segment: paddr=00010000h, vaddr=42000000h, size=03092h ( 12434) map
*** Booting Zephyr OS build v3.7.0-rc1-542-g1159c2addaac ***
Hello World! esp32c3_devkitm/esp32c3
alkurop commented 4 months ago

I'm on this commit. 

commit 895f246227e2ce78fcea54d29dcfd730633ad9be (HEAD -> main)
Author: Glenn Andrews <glenn.andrews.42@gmail.com>
Date:   Sat Jun 15 08:32:37 2024 -0700

Do you think it's better to check out a release branch?

My log without the modification of the overlay looks like this

Wrote 147456 bytes at 0x00000000 in 1.0 seconds (1198.4 kbit/s)...
Hash of data verified.

Leaving...
Hard resetting via RTS pin...
--- idf_monitor on /dev/cu.usbmodem1114201 115200 ---
--- Quit: Ctrl+] | Menu: Ctrl+T | Help: Ctrl+T followed by Ctrl+H ---
ESP-ROM:esp32c3-api1-20210207
Build:Feb  7 2021
rst:0x15 (USB_UART_CHIP_RESET),boot:0xc (SPI_FAST_FLASH_BOOT)
Saved PC:0x4038168a
0x4038168a: arch_cpu_idle at /Users/alex/zephyrproject/zephyr/arch/riscv/core/cpu_idle.c:13

SPIWP:0xee
mode:DIO, clock div:2
load:0x3fc89820,len:0x1a6c
load:0x40380000,len:0x9810
0x40380000: iram_vma at ??:?

SHA-256 comparison failed:
Calculated: 25b01b3a6ef98d3662b1b3da27872db316ccb0107dcdbc649e9b3eb49dbbf428
Expected: 00000000404d0000000000000000000000000000000000000000000000000000
Attempting to boot anyway...
entry 0x403815c2
0x403815c2: __start at /Users/alex/zephyrproject/zephyr/soc/espressif/common/loader.c:227

I (60) boot: ESP Simple boot
I (60) boot: compile time Jun 28 2024 21:51:16
I (60) boot: Multicore bootloader
I (61) spi_flash: detected chip: generic
I (62) spi_flash: flash io: dio
W (65) spi_flash: Detected size(4096k) larger than the size in the binary image header(2048k). Using the size in the binary image header.
I (77) boot: chip revision: v0.4
I (80) boot.esp32c3: SPI Speed      : 40MHz
I (84) boot.esp32c3: SPI Mode       : SLOW READ
I (88) boot.esp32c3: SPI Flash Size : 4MB
I (92) boot: Enabling RNG early entropy source...
[esp32c3] [INF] DRAM: lma 0x00000020 vma 0x3fc89820 len 0x1a6c   (6764)
[esp32c3] [INF] IRAM: lma 0x00001a94 vma 0x40380000 len 0x9810   (38928)
0x40380000: iram_vma at ??:?

[esp32c3] [INF] padd: lma 0x0000b2b8 vma 0x00000000 len 0x4d40   (19776)
[esp32c3] [INF] IMAP: lma 0x00010000 vma 0x42000000 len 0x32f0   (13040)
0x42000000: _OffsetAbsSyms at /Users/alex/zephyrproject/zephyr/arch/riscv/core/offsets/offsets.c:140

[esp32c3] [INF] padd: lma 0x000132f8 vma 0x00000000 len 0xcd00   (52480)
[esp32c3] [INF] DMAP: lma 0x00020000 vma 0x3c010000 len 0xff0    (4080)
[esp32c3] [INF] Image with 6 segments
[esp32c3] [INF] DROM segment: paddr=00020000h, vaddr=3c010000h, size=00FF0h (  4080) map
[esp32c3] [INF] IROM segment: paddr=00010000h, vaddr=42000000h, size=032F0h ( 13040) map
alkurop commented 4 months ago

With overlay as described, it now looks like this

Wrote 147456 bytes at 0x00000000 in 1.0 seconds (1205.6 kbit/s)...
Hash of data verified.

Leaving...
Hard resetting via RTS pin...
--- idf_monitor on /dev/cu.usbmodem1114201 115200 ---
--- Quit: Ctrl+] | Menu: Ctrl+T | Help: Ctrl+T followed by Ctrl+H ---
ESP-ROM:esp32c3-api1-20210207
Build:Feb  7 2021
rst:0x15 (USB_UART_CHIP_RESET),boot:0xc (SPI_FAST_FLASH_BOOT)
Saved PC:0x4038168a
0x4038168a: arch_cpu_idle at /Users/alex/zephyrproject/zephyr/arch/riscv/core/cpu_idle.c:13

SPIWP:0xee
mode:DIO, clock div:2
load:0x3fc89820,len:0x1a6c
load:0x40380000,len:0x9810
0x40380000: iram_vma at ??:?

SHA-256 comparison failed:
Calculated: 09ccfa51459f0b85fa20c39d4065c9d917a10f7d3e536253558340a78768d789
Expected: 00000000404d0000000000000000000000000000000000000000000000000000
Attempting to boot anyway...
entry 0x403815c2
0x403815c2: __start at /Users/alex/zephyrproject/zephyr/soc/espressif/common/loader.c:227

I (60) boot: ESP Simple boot
I (60) boot: compile time Jun 28 2024 21:53:50
I (60) boot: Multicore bootloader
I (61) spi_flash: detected chip: generic
I (62) spi_flash: flash io: dio
W (65) spi_flash: Detected size(4096k) larger than the size in the binary image header(2048k). Using the size in the binary image header.
I (77) boot: chip revision: v0.4
I (80) boot.esp32c3: SPI Speed      : 40MHz
I (84) boot.esp32c3: SPI Mode       : SLOW READ
I (88) boot.esp32c3: SPI Flash Size : 4MB
I (92) boot: Enabling RNG early entropy source...
[esp32c3] [INF] DRAM: lma 0x00000020 vma 0x3fc89820 len 0x1a6c   (6764)
[esp32c3] [INF] IRAM: lma 0x00001a94 vma 0x40380000 len 0x9810   (38928)
0x40380000: iram_vma at ??:?

[esp32c3] [INF] padd: lma 0x0000b2b8 vma 0x00000000 len 0x4d40   (19776)
[esp32c3] [INF] IMAP: lma 0x00010000 vma 0x42000000 len 0x32f0   (13040)
0x42000000: _OffsetAbsSyms at /Users/alex/zephyrproject/zephyr/arch/riscv/core/offsets/offsets.c:140

[esp32c3] [INF] padd: lma 0x000132f8 vma 0x00000000 len 0xcd00   (52480)
[esp32c3] [INF] DMAP: lma 0x00020000 vma 0x3c010000 len 0xff0    (4080)
[esp32c3] [INF] Image with 6 segments
[esp32c3] [INF] DROM segment: paddr=00020000h, vaddr=3c010000h, size=00FF0h (  4080) map
[esp32c3] [INF] IROM segment: paddr=00010000h, vaddr=42000000h, size=032F0h ( 13040) map

*** Booting Zephyr OS build v3.7.0-rc1-313-g895f246227e2 ***
Set up button at gpio@60004000 pin 1
Set up LED at gpio@60004000 pin 0
Press the button
sylvioalves commented 4 months ago

I think I missed something in there. Last post shows it worked. What is the issue then?

alkurop commented 4 months ago

It only worked after I modified, the overlay, but not out of the box. Basically, I added my comment for anyone else with the same problem, to know how to modify the overlay to get the monitor working

sylvioalves commented 4 months ago

You mean you only got it working after deferring uart0 init by the below?

&uart0 {
    zephyr,deferred-init;
};
alkurop commented 4 months ago

Yes this. And also I have a lot of warnings. This ram warning 0x40380000: iram_vma at ??:?

Sha verification warning Calculated: 9b9ca907870209d00e0377014be2a2168815abc1a093d70dc8da2a708ed6a6f8 Expected: 0000000040620000000000000000000000000000000000000000000000000000 Attempting to boot anyway...

And also rtc timer address warning in the DeviceTreeOverlay preview.

A bit of an off top, but maybe you know, what esle to modify in the overlay to fix them?

heepdog commented 4 months ago

I had the same issue with a fresh install, and flashing to an esp32c3 supermini.
after adding zephyr,deferred-init; to the &uart0 section of "esp32c3_devkitm.dts", It worked as expected.