Open 68ec020 opened 3 months ago
cc @soburi
Hi, @68ec020
Could you try clock_control_on
the GPOUT0 before the ENC424J600 driver initializing?
such like...
const struct device *clk_dev = DEVICE_DT_GET(DT_NODELABEL(clocks));
clock_control_on(clk_dev, RPI_PICO_CLKID_CLK_GPOUT0);
I use a ENC424J600 ethernet controller connected to a RPi Pico. The Pico also should generate the 25 MHz clock for the ENC424J600. In Zephyr v3.5.0 I used a PRE_KERNEL_1 SYS_INIT and the RPi Pico SDK to initialise the clock output:
clock_gpio_init(21, CLOCKS_CLK_GPOUT0_CTRL_AUXSRC_VALUE_CLKSRC_PLL_SYS, 5);
In Zephyr v3.6.0 this is no longer working, because we have a real clock control now. This disables GPOUT0 during initialisation. And so far I didn't manage to enable the pin again in the device tree. I managed to set the pinctrl to the right function:
This is working, but the ENABLE bit in CLK_GPOUT0_CTRL is still 0. I tried to "use" the clk_gpout0 in gpio0 and set the frequency, but no luck so far:
Any help is appreciated.
Regards, Jan