Open HelligeChris opened 1 month ago
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Please use our bug template when reporting bugs. You need to edit this issue to include the information requested in https://github.com/zephyrproject-rtos/zephyr/blob/main/.github/ISSUE_TEMPLATE/001_bug_report.md
Hey, I reformatted the issue, though the "Steps to reproduce" section leaves much to be desired...
Hi @HelligeChris
if a concurrent transfer occurs,
By this you mean another UART DMA transfer or another DMA transfer from any other device?
Hi @HelligeChris
if a concurrent transfer occurs,
By this you mean another UART DMA transfer or another DMA transfer from any other device?
okey, I just noticed
we used a DMA to update DAC output at 1MHz
So it's the 2nd case right?
Hi @ajarmouni-st, from what I can see in the errata it shouldn't matter if it's a UART DMA transfer or DMA transfer to the DAC. Since both the UART and DAC request the DMA to transfer data, though we only noticed it when using the DMA to update the DAC while the also having the UART running.
This is properly because the DAC was requesting DMA transfers so quickly.
@ajarmouni-st as there is no assignee, this PR pops up for triaging again. Should be consider this issue resolved?
Describe the bug Using the UART async driver, when a USART is issuing a DMA request to transfer data, if a concurrent transfer occurs, the requested transfer may not be served, and the DMA stream may stay locked. This causes the UART async driver to lock up and stop sending packages (uart_tx keeps reporting EBUSY).
To Reproduce Using the board stm32h743Xi.dtsi
Steps to reproduce the behavior:
Expected behavior The UART kept sending messages without locking up
Impact We used a workaround where we manually set bit 20 in DMA_SxCR on UART streams.
Environment (please complete the following information):
Additional context Issue is described in the stm32h7 errata section 2.20.6 and effect the following microcontrollers: