zero-day-labs / riscv-iommu

IOMMU IP compliant with the RISC-V IOMMU Specification v1.0
Apache License 2.0
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Not throwing error when pte.rsw bits are set #14

Closed mhayat-10xe closed 2 months ago

mhayat-10xe commented 2 months ago

RISC-V privileged specification stated in section 4.3.2 "Virtual Address Translation Process":

  1. If pte.v = 0, or if pte.r = 0 and pte.w = 1, or if any bits or encodings that are reserved for future standard use are set within pte, stop and raise a page-fault exception corresponding to the original access type.

However, when pte.rsw bits are set to 1, satisfying point 3, it does not stop and raise a page-fault exception on this point.