This would allow for more efficient TCP bridging, since the bridge can hold off sending data over TCP as long as a burst is incoming (reducing the overhead of repeated, small TCP send calls). Might help with FPGA-based emulation as well.
Implementing this would at least involve wiring up the "last" signal in umi_tx_sim and in the FPGA version umi_fpga_queues.sv.
This would allow for more efficient TCP bridging, since the bridge can hold off sending data over TCP as long as a burst is incoming (reducing the overhead of repeated, small TCP send calls). Might help with FPGA-based emulation as well.
Implementing this would at least involve wiring up the "last" signal in
umi_tx_sim
and in the FPGA versionumi_fpga_queues.sv
.