Closed karthikbhat77 closed 9 years ago
You shouldn't have to add anything to the device tree, since the FPGA interrupts should already be in there. You don't need to enable anything other than the HPS2FPGA bridge. Could you tell me where things start to go wrong? Is it in the kernel driver or in the userspace program?
I'm not trying the same exact example you have shown. I want to write data from FPGA to HPS using the FPGA2HPS bridge. I actually write to the on-chip memory on the HPS side and I have mapped that address(0xFFFF0000) in my kernel driver. I read the correct data written from FPGA on the linux side. Now, I want to have interrupts whenever FPGA writes to HPS. So, I have a master sending out interrupts right after I write the data to the on-chip memory (same technique as you have showed, have an interrupt_sender pin in my MM master).
In the userspace program I have the "fread" function. When I debug, the program is just stuck at "fread" line. My kernel driver is same as yours, it blocks the read until it gets an interrupt. As my program is stuck infinitely at "fread" function it tells me that I am not getting any interrupts. Also, I used cat /proc/interrupts to check if I'm getting interrupts, nothing.
[root@SoCKIT:/home/jdsu]#cat /proc/interrupts CPU0 CPU1 29: 676465 677916 GIC twd 72: 0 0 GIC fpga2hps 73: 0 0 GIC fpga2hps 74: 0 0 GIC fpga2hps 152: 4063 0 GIC eth0 160: 1 0 GIC dwc_otg, dwc_otg_hcd:usb1 171: 56000 0 GIC dw-mci 176: 1 0 GIC 183: 0 0 GIC ff705000.spi 186: 0 0 GIC dw_spi0 188: 0 0 GIC dw_spi1 190: 10 0 GIC ffc04000.i2c 194: 360 0 GIC serial 201: 17 0 GIC timer2 207: 2 0 GIC fpga-mgr IPI0: 0 0 CPU wakeup interrupts IPI1: 0 0 Timer broadcast interrupts IPI2: 1724 3816 Rescheduling interrupts IPI3: 0 0 Function call interrupts IPI4: 2 1 Single function call interrupts IPI5: 0 0 CPU stop interrupts Err: 0 You can see 3 interrupts being registered, 72,73, and 74.
Please ask me if you need anything to help me out. Karthik
Hi Howard,
I'm trying to send interrupts from FPGA to HPS and followed your tutorial(Part X). I'm generating interrupts from the slave on the FPGA which I can see it on the signal tap. I'm checking for interrupts in Linux using 'cat /proc/interrupts', I see that my interrupts are registered but I don't get any interrupts.
In the RTL viewer, I see that the interrupt bus (f2h_irq_p0[31:0] & f2h_irq_p1[31:0]) are not connected to anything in the 'fpga to hps interfaces'( this is the block where it shows connections of all the bridges between HPS and FPGA) shown in the figure. Is it just not illustrated in the RTL viewer or is there no connection.![hps](https://cloud.githubusercontent.com/assets/12192554/7866798/5b5aaa5e-0537-11e5-82cb-ed05dfa64fee.JPG)
I don't know what I'm doing wrong or if I'm missing something. Do I have to make any changes to the device tree? Or should I enable something like I enable the bridges?
Please help me on this.
Thanks, Karthik