llvm: `@Vector(4, u80)` parameters trigger an assertion on aarch64 with optimizations disabled

[jacobly0]

zig: llvm/lib/CodeGen/GlobalISel/CallLowering.cpp:466: void buildCopyFromRegs(MachineIRBuilder &, ArrayRef<Register>, ArrayRef<Register>, LLT, LLT, const ISD::ArgFlagsTy): Assertion `DstEltTy.getSizeInBits() % PartLLT.getSizeInBits() == 0' failed.
    frame #5: 0x00007fffdafce1e6 libLLVMGlobalISel.so.18.1`buildCopyFromRegs(B=0x0000000008c43640, OrigRegs=ArrayRef<llvm::Register> @ 0x00007ffffffe7228, Regs=ArrayRef<llvm::Register> @ 0x00007ffffffe7218, LLTy=(IsScalar = 0, IsPointer = 0, IsVector = 1, RawData = 5242884), PartLLT=(IsScalar = 1, IsPointer = 0, IsVector = 0, RawData = 64), Flags=llvm::ISD::ArgFlagsTy @ 0x00007ffffffe7658) at CallLowering.cpp:466:5
    frame #6: 0x00007fffdafcbb7f libLLVMGlobalISel.so.18.1`llvm::CallLowering::handleAssignments(this=0x000000000448ac80, Handler=0x00007ffffffe7e90, Args=0x00007ffffffe82d8, CCInfo=0x00007ffffffe7ef8, ArgLocs=0x00007ffffffe8070, MIRBuilder=0x0000000008c43640, ThisReturnRegs=ArrayRef<llvm::Register> @ 0x00007ffffffe7bc0) const at CallLowering.cpp:863:7
    frame #7: 0x00007fffe59ace51 libLLVMAArch64CodeGen.so.18.1`llvm::AArch64CallLowering::lowerFormalArguments(this=0x000000000448ac80, MIRBuilder=0x0000000008c43640, F=0x00000000047055e8, VRegs=ArrayRef<llvm::ArrayRef<llvm::Register> > @ 0x00007ffffffe7e30, FLI=0x0000000004835438) const at AArch64CallLowering.cpp:705:8

[Rexicon226]

Zig repro:

test {
    var v: @Vector(4, u80) = .{ 10, 20, 30, 40 };
    var x: @Vector(4, u80) = .{ 1, 2, 3, 4 };
    _ = .{ &v, &x };
    try std.testing.expectEqual(v + x, .{ 11, 22, 33, 44 });
}

LLVM IR repro:

target triple = "aarch64-unknown-linux-musl"

; N x i80, where N is > 1
define void @foo(<2 x i80> %0) {
  ret void
}

[Rexicon226]

Upstream: https://github.com/llvm/llvm-project/issues/99639

[andrewrk]

Ah, thank you. I will update the CI tarballs shortly to enable LLVM assertions.

[Rexicon226]

It turns out this was fixed in LLVM just a month ago, so it should be gone when we update to LLVM 19.

[andrewrk]

Great! Thanks for finding that out.

[alexrp]

Unfortunately, this test now hits a different assertion:

/home/alexrp/Source/llvm-project-19/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp:1408: virtual llvm::MachineInstrBuilder llvm::MachineIRBuilder::buildInstr(unsigned int, llvm::ArrayRef<llvm::DstOp>, llvm::ArrayRef<llvm::SrcOp>, std::optional<unsigned int>): Assertion `llvm::all_of(SrcOps, [&, this](const SrcOp &Op) { return (Op.getLLTTy(*getMRI()).isVector() && Op.getLLTTy(*getMRI()) == SrcOps[0].getLLTTy(*getMRI())); }) && "type mismatch in input list"' failed.