Closed andrewrk closed 1 year ago
i386 is short for 80386 (1985). Pentium 4 (2000) all support MMX, SSE, SSE2. x86.cpu.pentium4
is listed as supporting SSE2 for example, which was not present in i386.
So yes, .i386 => &x86.cpu.pentium4
is not technically correct.
i686 (meaning P6 architecture, 1995) did not have SSE2, so we are targeting something slightly newer than both i386 and i686.
I'm in favour of calling the baseline cpu model x86, and just documenting that it's based off some specific intel micro architecture. edit: this is because pentium 4 was branding which contained many micro architectures - specifying Willamette, Northwood etc would be better.
i686 first incarnation was the Pentium Pro which lacked the MMX instruction set. All pentium 4 supported MMX, SSE, SSE2; starting with the Prescott core they supported SSE3 as well.
_i686, pentiumpro_ Intel PentiumPro CPU.
_pentium4, pentium4m_ Intel Pentium4 CPU with MMX, SSE and SSE2 instruction set support.
_prescott_ Improved version of Intel Pentium4 CPU with MMX, SSE, SSE2 and SSE3 instruction set support.
Shouldn't this be labeled arch-x86 then? ;)
related: #4371
x86
is general accepted to cover all the *86 processors, including e.g. the 8086 and 80286 which are 16bit.
I think what we want is more formally known as "IA-32" of which the 386 was the first.
x86
is general accepted to cover all the *86 processors, including e.g. the 8086 and 80286 which are 16bit. I think what we want is more formally known as "IA-32" of which the 386 was the first.
I agree with this suggestion from a technical correctness standpoint, but I disagree that "x86", as it is commonly used in the wild, implies support for 286 and below.
IMHO it's either
.i686 => &x86.cpu.pentiumpro,
which has the NOPL instruction
which would reject, for example, the AMD Geode LX as a i686.
or
.i686 => &x86.cpu.i686,
which doesn't:
The baseline value we use for "i386" is currently a pentium4 cpu model, which is, I believe i686. I think it would be more correct to use "x86" rather than "i386" for this CPU architecture.
https://github.com/ziglang/zig/blob/80ff549e2602ecfc4eaf9ade0108e1779dff1874/lib/std/target.zig#L947