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KLayout 2.9.6
2 different GatPoly should have 180nm or 250nm distance. but there is no DRC error at 70nm.
im not sure what the correct minimum is in this case:
OS-WIN10 Python-3.6.3 PySpice-1.4.3 simulator-ngspice
### Expected Behaviour
I am trying to build a common simulator for the CMOS …
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There is a spreadsheet @ [GF180MCU (GlobalFoundries 180nm PDK) -- Primitive Model Naming](https://docs.google.com/spreadsheets/d/1G88IhyqXGVu-BgH8hA-_N2YQnNiyPoPEqvXSOzmOaaY/edit#gid=1803291424) which…
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I am currently aiming to tape out a chip using SMIC's 180nm process. I am keeping the ibex core unchanged, but I need to embed SRAM on the chip. I use SMIC's memory compiler to generate the RAM's Veri…
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It would be awesome to see how this CPU would work in ASIC form and Google is offering free tape outs to open source silicon projects on SkyWater's 130nm and GlobalFoundries 180nm MCU process technolo…
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In the irradiance calculation results (`irradiance.html`), we see that the DownScan and UpScan results are shifted by ~0.02nm relative to the reference spectrum (as well as relative to each other). T…
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we have just released a fully open source PDK for Globalfoundries 180nm process technology.
The repositories are now available under https://github.com/google - see https://github.com/google?q=glob…
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One of the other SIMD instruction sets that you may want to consider is RISC-V's vector extension, because it takes a totally different approach than most other common ISAs:
it uses scalable vectors …
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Thanks for making this tool. The latest change sets (Mar 21) solve most of the issues we were seeing, except this one.
We had previously done reg files with latches and multiplexors (in TSMC 180nm…
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In TLEF files for any layer a WIREEXTENSION can be set:
```
LAYER MET2
TYPE ROUTING ;
WIDTH 0.28 ;
SPACING 0.28 ;
WIREEXTENSION 0.19 ;
# ...
END MET2
```
This should result…