-
Hello.
I have a Colorlight 5A-75E board (v8.0) however, looks like IceStudio does not support to program it via `FT232RL`.
I was able to program it via command line following the documentation: ht…
-
```
FastTransfer is called with pointer to a non empty output buffer, and an input
buffer, transfer size : 2 bytes.
Expecting a 2-byte SPI transaction, but only the start and stop condition (CS
goi…
-
```
What steps will reproduce the problem?
1. Plug in an FTDI device with multiple interfaces (e.g. FT2232H w/IFACE_A,
IFACE_B)
2. Connect to the first one (successfully), using e.g. SPI:
mpsseA = Op…
-
```
What steps will reproduce the problem?
1. Plug in an FTDI device with multiple interfaces (e.g. FT2232H w/IFACE_A,
IFACE_B)
2. Connect to the first one (successfully), using e.g. SPI:
mpsseA = Op…
-
We need clock stretching mode to communicate with the PIC on S19j and earlier hashboards.. According to the [pyftdi docs](https://eblot.github.io/pyftdi/api/i2c.html#pyftdi.i2c.I2cController), the FT4…
skot updated
4 months ago
-
```
What steps will reproduce the problem?
1. Plug in an FTDI device with multiple interfaces (e.g. FT2232H w/IFACE_A,
IFACE_B)
2. Connect to the first one (successfully), using e.g. SPI:
mpsseA = Op…
-
```
What steps will reproduce the problem?
1. Plug in an FTDI device with multiple interfaces (e.g. FT2232H w/IFACE_A,
IFACE_B)
2. Connect to the first one (successfully), using e.g. SPI:
mpsseA = Op…
-
There are SPI flash chips like W25Q128FV that support dual/quad SPI (using 2/4 inputs/outputs) to double/quadruple speed.
I had a look on the source of flashrom but I am not sure if that would work w…
-
Hello @WangXuan95 and thanks for this IP, it saves me a lot of time.
I've ported your code to Verilog.
I'm working on a ECP5 Lattice, running at synchronous mode a FT2232H.
I've built a simple pr…
-
Problem:
```
$ openFPGALoader -b arty_a7_35t /home/foo/git/external/f4pga-examples/xc7/counter_test/build/arty_35/top.bit
unable to open ftdi device: -4 (usb_open() failed)
JTAG init failed with…