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### Problem statement
Current front-end, while functional and extensible by plugins, have become tedious to maintain and work with.
### Hypothesis
Given that:
- Lots of CKAN sites are maintained b…
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Axzez just announced their new [Interceptor CM4 Carrier Board](https://www.axzez.com/axzez-circuit-boards), which has:
- 2 HDMI ports (4Kp60)
- 5 SATA ports (via JMicron JMB585)
- 4 RJ-45 g…
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We have a design that exhibits non-deterministic behaviour when run at a high clock speed (div=5), but behaves correctly at a lower clock speed (div=6).
We were able to [fix this by breaking a path](…
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After [accepting the alpha version of the code](https://github.com/Koenkk/zigbee-herdsman/pull/317), now I propose to write comments here until we complete the development.
The adapter is designed …
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## Personal Details
**Name**: Edmund Lam
**Major**: Computer Science and Mathematics
**Year in Cornell & Expected graduation date:** Sophomore, 2024 or 2025
**Relevant classes**: CS 3410, …
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This ticket is meant as supplement to #315 as well as a place where ideas can be discussed in more detail and outside of the scheduled meeting(s). As far as I can see, we basically have these options:…
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There are a bunch of new VaspInputSets in atomate2:
https://github.com/materialsproject/atomate2/tree/main/src/atomate2/vasp/sets
Shyue Ping has suggested to move them into pymatgen. I wanted to…
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### Background and motivation
The STJ source generator's implementation of the `JsonSerializerContext.GetTypeInfo` and `IJsonTypeInfoResolver.GetTypeInfo` methods are currently duplicated:
```C#
…
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# Open Grant Proposal: FileMarket’s Data Onboarding & Validation incentives system
**Project Name:** FileMarket’s Data Onboarding & Validation incentives system for retail users and other dApps dev…
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I'm trying to build the open source FPGA binaries following the video "How to build the open source FPGA design for the Time Card from scratch", linked in the FPGA "README.md" file.
The first step,…