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I have a block design with AXI_DMA IP included, and I have verify it with bare metal system. Then I follow the README to build the driver/device tree/app. The "axidma.ko" can be inserted successfully,…
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Hey,
thanks for your work, I will try using it for a future project.
You're writing that the fpga bitstream needs to be loaded by the FSBL and I wonder why is it so?
I need to reload the fpga bit…
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Hi Brandon,
I'm trying to use your driver on a zedboard but the error in the title comes up, I tried increasing to cma=45M in the hope that it would fix the issue but it doesn't.
After booting, …
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Sometimes, when try to use two way transfer I get timeout error (in receive part). Also, I see that data correctly send out from DMA, but in some causes incorrect received (if set false on wait).
[t…
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hey brandon, i didnt add your cma args into my bootargs, then i run the insmod and look up the dmesg, it shows that
[ 113.487763] random: nonblocking pool is initialized, i think if it was the boot…
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Currently, the transfer function does not fully support VDMA; it currently hard codes the frame size to 1920x1080x4. In order to properly generalize this functionality, a struct should be added that c…
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anybody get VDMA loopback working on MPSOC(ZCU102)?
vdmatest works fine but when I tried examples/benchmark with -v option I got a segmentation fault, and kernel NULL pointer exception.
here is th…
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Can your driver be attached to and run multiple DMA IPs (concurrently or one at a time)? If not do you have any plans to extend the driver to support multiple DMAs?
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Hi!
I want to use your driver for a simple openCV application with a filter in hardware. For the image transfer between PL and PS I use a VDMA block with transmit and receive channel. The benchmark e…
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I want to output a `JPEG ` by HDMI,
but I get a `'JPEG' object has no attribute 'flush'` error,
```
img_folder = './yoloimages/'
img_file = os.path.join(img_folder, random.choice(os.listdir(im…
ghost updated
6 years ago