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Consider the following shader:
```hlsl
float myTest : MYVALUE0 = 21;
float4 myColor : MYCOLORVALUE0 = float4(0.5, 0, 0, 1);
float4 ps() : SV_TARGET {
return myColor;
}
```
Where the sema…
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I would like to request new templates relying solely on DX12 compute without any windowing or event handling. Computing the simplest SAXPY example. Seomthing akin to my compute samples using [OpenCL](…
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**Description**
DXC page faults if you attempt to feed a cs_6_3 input to the linker.
**Steps to Reproduce**
Create this file and name it test.hlsl:
```
Texture2D texResource : register(t900);
…
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- [ ] Implement `ddx_fine` clang builtin,
- [ ] Link `ddx_fine` clang builtin with `hlsl_intrinsics.h`
- [ ] Add sema checks for `ddx_fine` to `CheckHLSLBuiltinFunctionCall` in `SemaChecking.cpp`
- [ …
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Follow up from #6747 :
```
void bar (inout float p) { }
[numthreads(1, 1, 1)]
void main() {
int3 a = 0;
bar(a);
}
```
```
dxc -T cs_6_6 -E main -spirv -fcgl repro.hlsl
dxc: /h…
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this dxil is generate from Microsoft dxbc2dxil tool, but convert to spirv the following error occurred,
[cs5…
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Hello,
My configuration:
- Windows 11
- Visual studio 2022 or 2019
- Latest Windows SDK 10.0.22621.0
- I used the last DXC : [https://github.com/microsoft/DirectXShaderCompiler/releases/tag/v1…
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This shader compiles without warning or error even though the load address is undef.
```
// dxc /Tps_6_0 t.hlsl
ByteAddressBuffer b;
[RootSignature("UAV(u0), SRV(t0)")]
float main(uint a : A)…
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IMul/UMul/UDiv ops with two outputs have been part of the shader models since 4.0, but HLSL has never explicitly exposed these to HLSL so they could be fully used.
This is the suggestion that we sh…
tex3d updated
5 months ago
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**Description**
When compiling a simple spir-v raygen shader sampling a texture with a linux build of DXC, Valgrind's memcheck identifies several conditional branches on uninitialized memory. In re…