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To continue we started with the official website https://github.com/hex-five/multizone-sdk on our virtual box with ubuntu machine and we are trying to connect "Arty A7 100T" board. Now we are working …
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### Environment
Compile host and VSCODE host is a Linux server in another room.
Remote JTAG server is my laptop running OpenOCD.
Target is: Microsemi Polarfire RISCV soft cpu core.
All of this …
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Hey, so I was attempting to build the hello world example for RISC-V target and then use Spike to run the subsequent binary file.
These are the commands I used to do this:
1. git clone https://git…
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@Moschn would you be okay licensing the Bootrom under Apache? As far as I've seen there isn't any license associated with it.
`https://github.com/openhwgroup/cva6/tree/master/corev_apu/fpga/src/boo…
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This issue tracks the porting of boards and SoCs to https://github.com/zephyrproject-rtos/zephyr/issues/51833.
### SoC series: AGILEX
- [x] soc: AGILEX
- [x] board: intel_socfpga_agilex_socdk, …
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Take the function `mtime_get`
```c
static long long mtime_get() {
int low, high;
do {
high = *(int*)(0x200bff8 + 4);
low = *(int*)(0x200bff8);
} while ( *(int*)(0x…
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### Is there an existing CVA6 bug for this?
- [X] I have searched the existing bug issues
### Bug Description
I have transplanted CVA6 to a non-genesys2 FPGA development board, and I can also use t…
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I am not sure where asking this, but I am putting it here with the hope of getting some sort of guidance.
I am using the Microsemi polarfire soc, to be more accurate, I am using the Microchip Polar…
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Freely discuss your opinions on an ARM platform for Grbl, moving forward after v1.1.
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Hi everyone,
I tried to get this project worked on VCU118.
My sd card: SanDisk microSD 16GB.
But I always get the following warning when I prepared the SD card with command: sudo sgdisk --clear --n…