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Currently, the softcore has to pass the ebreak complience test, but I don't see any sense in this for a softcore which only implement the machine mode / without linux.
Also, it has the side effect …
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I configured the toolchain with ```./configure --prefix=/home/user/Riscv_most_combinations --with-multilib-generator="rv32i-ilp32--;rv32ic-ilp32--;rv32iac-ilp32--;rv32im-ilp32--;rv32imc-ilp32--;rv32im…
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### Technical Group
Golden Model SIG
### ratification-pkg
Technical Debt
### Technical Liaison
Bill McSpadden
### Task Category
SAIL model
### Task Sub Category
- [ ] gcc
-…
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I'm seeing this affecting a line like this:
```
sccache /usr/bin/c++ -o CMakeFiles/SetLang.dir/bar.c.o -c "/builds/gitlab-kitware-cmake ci/Tests/SetLang/bar.c"
/builds/gitlab-kitware-cmake ci/…
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Hi all,
I have put together a small patchset which implements command-line bitmanip ISA subset selection. I've tried to follow the current bitmanip draft spec as closely as possible. In particular,…
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Hi,
Here is my command before `make`.
`../configure --prefix=$RISCV_TOOLCHAIN_ROOT_32 --host=riscv32-unknown-elf --with-arch=rv32i`
Here is error message I got.
```
../pk/entry.S: Assembler messa…
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### Description
Hi,
I've created a project with multiple build configurations. The project was originally created with Risc-V target, and then I've added a build configuration with ARM (Cortex-M).…
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I am having this issue while compiling hello.c. I tried the solution mentioned in the other issue as well. Please see the compilation results below:
**PS: I noticed that I did not have riscv-elf fo…
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| | |
|--------------------|----|
| Bugzilla Link | [PR45708](https://bugs.llvm.org/show_bug.cgi?id=45708) |
| Status | NEW |
| Importance | P enhancemen…
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Something in the UART monitor appears to really dislike wrapping text.
If I make the window wide enough to accommodate long lines, then it doesn't lock up. However, as soon as text needs to wrap, o…