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**Environment**
VSG 3.25
Ubuntu 22.04
**Describe the bug**
IndexError when a file has `for generate` followed by `if generate`,. Only occurs if the `if generate` contains an `else generate`
*…
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- On each block VHDL source code, please consider adding an hyperlink to the documentation of it. Makes it more friendly to navigate from source code to documentation in GitHub. This is similar to wha…
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**Environment**
Installed using `pip install vsg --use-pep517 ` on Ubuntu 22.04.4 LTS
**Describe the bug**
I made the rule:
```
port_map_002:
case: 'camelCase'
```
But when I run `vsg`, …
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**Is your feature request related to a problem? Please describe.**
I've noticed that there is a great deal of duplicated code in the test files in tests/vhdlFile/, which test the parser's ability to …
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**What is your question?**
DISCLAIMER: This is a question and suggestion. let me know if you want me to seperate the suggestion into a seperate issue for tracking my feature request.
I actively us…
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Hello Together,
this looks like a real cool project, but why implementing ```reduce``` functions in:
https://github.com/open-logic/open-logic/blob/8b025ca8dea5a65fad18100fa751a48e1407b0d0/src/ba…
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Hello
Thanks for this nice software.
I was wondering if it is possible to do incremental DIC analysis with your software ?
I mean in the set of images (IMG_1, IMG_2, IMG_3) pefomed 1 DIC betwee…
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What is the recommended dependencies for vsgPhysX?
I have cloned the https://github.com/NVIDIA-Omniverse/PhysX and attempted to build it under Kubuntu 22.04 but it's complaining about clang and cla…
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**Environment**
```
$ python --version
Python 3.11.5
$ vsg --version
VHDL Style Guide (VSG) version: 3.25.0
```
**Describe the bug**
This appears to be some kind of edge case that causes VSG…
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**Environment**
* VSG 3.25.0
* Ubuntu 20.04
* Python 3.8 (also tested with 3.12)
**Describe the bug**
VSG crashes when processing a specific combination of generate statements.
**To Reproduc…