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I think that IMDCE is not deleting instances of public modules, which should be allowed. Given the following test case:
```firrtl
FIRRTL version 4.0.0
circuit Foo:
public module Bar:
publ…
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I get the same error when trying to generate the bitstream from the command line. Furthermore, to open the design in Vivado, I don't know which files to include.
**Command:** make CONFIG=rocket64b2 …
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Both registers have a reset, although the first uses the `regreset` representation, and the latter uses a regular `reg` driven by a mux.
```firrtl
FIRRTL version 4.0.0
circuit Foo: %[[
{
"…
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### Checklist
- [x] Did you write out a description of the feature you want to see?
- [x] Did you look around for any related features?
- [x] Did you specify relevant external information?
###…
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This is related to https://github.com/llvm/circt/issues/4886 in that this is sort of a special case. Fixing #4886 would fix this issue so long as infer-resets is followed by dedup (as it currently is)…
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What is the internal structure of firrtl-interpreter and what is the model? How to change the signal inside the model(poke or peek)? Can someone explain it? See the source code or do not understand.
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### Background Work
- [X] Yes, I searched the [mailing list](https://groups.google.com/forum/#!forum/chipyard)
- [X] Yes, I searched [prior issues](https://github.com/ucb-bar/chipyard/issues)
- […
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**Type of issue**: Bug Report
**Please provide the steps to reproduce the problem:**
Consider these tests: https://github.com/dtzSiFive/chisel3/commit/d8a3f1213c32a9e69fd6e15eaf4c9030ce2235f…
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### Background Work
- [X] Yes, I searched the [mailing list](https://groups.google.com/forum/#!forum/chipyard)
- [X] Yes, I searched [prior issues](https://github.com/ucb-bar/chipyard/issues)
- [X] Y…
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Hi, I'm just starting to test out chiffre and I was trying to setup the sample LeChiffre configuration. I ended up having to change the patch file, but now I am getting this error and I don't have an…