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The BIOS does not compare up on the Lattice ice40 HX8K EVB. There are several issues.
I have gotten some of the way here:
https://github.com/niklasnisbeth/litex-buildenv/commit/846fc6193972692f9…
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Hello,
can you please add support for icebreaker board?
it's ICE40 based open hardware board readily available for reasonable price through several vendors.
It's also fully documented here: https:/…
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I have a design that fails initial placement. This is mostly because of incompatible CE lines for the flipflops and it is for a LP384 which doesn't have a lot of resources and I'm trying to pack 330 L…
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Hello, can you please publish bitstream for ICEBREAKER board?
It seems to be opensource and extremely well documented:
https://github.com/icebreaker-fpga/icebreaker
Also you already support oth…
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Dear,
can anyone help me using BRAM 512 word, 16 bit as a ROM (RAM preloaded during FPGA power on)
using GHDL VHDL -> Yosys -> Lattice ICE40 FPGA please ?
Greetings,
Patrick
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The "||" (prog iCE) jumper configuration allows the iCElink to configure the iCE40 in slave mode but there's no such option in icesprog. How would I go about having the iCElink directly configure the …
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This request is for a command similar to ``apio time`` that reports the FPGA utilization. Alternatively, the time and the utilization reporting can be combined into a single reporting command, that ca…
zapta updated
4 weeks ago
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Hello, can you please add support/bitstream for ICEBREAKER board?
It seems to be opensource and extremely well documented:
https://github.com/icebreaker-fpga/icebreaker
Also you already support…
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### Version
Yosys 0.40+33 (git sha1 34d9a7451, clang++ 14.0.0-1ubuntu1.1 -fPIC -Os)
### On which OS did this happen?
Linux
### Reproduction Steps
```
wget https://people.osmocom.org/tnt/stuff/…
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Thanks for all the hard work making this package available.
I installed only one package with the command `pip install yowasp-nextpnr-ice40-8k`, on Windows 10 x64, Anaconda Python 3.7 (same result …