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https://github.com/NXP/i3c-slave-design/blob/cd9582ecb345bad1a5fa34af11d8e2443ccc23f2/unzipped/src/i3c_full_wrapper.v#L106
Like mentioned in the "Integration Guide", bits 12:8 of MAP_DA_AUTO should…
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#### What were you doing?
Running on Windows 7, I set my Octoprint upload folder to a folder where I also save and edit gcode. I had a gcode file in this directory open in my text editor, but was t…
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I am currently using the following setup:
[NUCLEO-L476RG](https://www.st.com/en/evaluation-tools/nucleo-l476rg.html)
[X-NUCLEO-IKS01A3](https://www.st.com/en/ecosystems/x-nucleo-iks01a3.html)
[ST…
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@markusroeleke, First off, thanks for using the pre-release nidigital API and giving us feedback before we finalize the API. We want to understand your usecase better and have a few questions:
1. C…
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The Portmaster was not able to initialize the nfqueue. This might be connected to #82 - but in that case the error later changed to not being able to initialize iptables itself.
**What happened**:
…
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The code contains 'standalone' generate blocks (no conditions) which are only allowed in Verilog 2001 but not in Verilog 2005.
These blocks are located here:
i3c_sdr_slave_engine.v: line 780
i3c_…
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Line 703 to 718 in i3c_regs.v infer latches on dma_r[5:4].
(We use SEL_BUS_IF = 5'b01111 and USE_D_RESET is not defined)
It looks like a tool issue since the latches are gone when adding
```
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When we set MAP_DA_AUTO[12:8] to 0 as specified on page 15 in the uArch spec when PID is not replaced, it causes these errors because PID is set to MAP_DA_AUTO[12:8]:
```
############### FATAL MES…
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This source do not have
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The current I2C traits assume 7-bit addressing. I recently encountered a situation where I needed to talk to a device that utilized a 10-bit address and while it was possible to manipulate the current…