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I'm promoting a case for more generality in STF LIB records. I believe more generality improves likelihood of broader adoption of the lib.
The STF specification makes assumptions about record forma…
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## Current situation
Flatcar cannot be built for the RISC-V architecture (https://riscv.org).
## Impact
Consumer boards are starting to become widely available, like the Vision 5, LicheePi 4A…
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**Describe the bug**
When building this on Ubuntu 24.04 as part of `pico-examples` and targeting `PICO_BOARD=pico2` you get the following warning:
```
FreeRTOS-Kernel/portable/ThirdParty/GCC/RP2350…
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what is the current status for jit translation-to SIMD/NEON instructions in relation to the RISC-V instruction set ?
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## Syscalls
Everything specific to Ethereum, up to running basic usual contracts.
- [ ] Clean up the syscalls ids, use EVM opcode values for clarity and guidelines
- [ ] msg.*
- [ ] tx.*
- [ …
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Hi
Is it possible to cross-compile the source code for RISC-V Architecture?
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For `abstractcs`, `abstractauto` and `command`, the RISC-V Debug spec reads:
> Writing this register while an abstract command is executing causes cmderr to become 1 (busy) once the command completes…
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Hi.
It doesn't seem that you have migrated - so I am reminding about the current situation:
> $ python3 setup.py build
> /usr/lib/python3.8/site-packages/setuptools/dist.py:473: UserWarning: No…
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.NET currently supports passing/returning structs according to hardware floating-point calling convention up to 16 bytes for reasons stated in https://github.com/dotnet/runtime/pull/107286#discussion_…
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Ola Colegas,
Estava dando uma olhada em projetos envolvendo RISC-V no Brasil e me deparei com o projeto de vcs. Na pagina da Unicap (https://riscv.ic.unicamp.br/) somente existem 2 projetos listado…