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Hello everyone,
I want to know which kind of JTAG debugger is supported on VCU118 board.
Xilinx internal JTAG chain via the bscane2 primitive or external JTAG debugger?
Is any changes needed on fpg…
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Hello!
I run the XRT/test/xrt/13_add_one example. It runs smooothly in hw type. BUT not in sw_emu type. Idont know why.
I use v++ to compile cl kernel to xo file and link it to xclbin file in sw_em…
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```
What steps will reproduce the problem?
1- download release 0.7.9 source code
2- perform install through : sudo ./setup.sh
3- run old project that was using version 0.6.2
The upgrade / installat…
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I have DMA vaildation test failure as follows.
```
$ xbutil validate -d 0000:42:00.1 --verbose -r "DMA"
Verbose: Enabling Verbosity
Starting validation for 1 devices
Validate Device …
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Hi @michaelgmcintyre ,
While trying to implement this project in Vivado, we found some syntax errors and some ports which were wrongly declared, like in file:
- [ ] https://github.com/opencomputepro…
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When a buffer is created using the OpenCL API, its reference count is set to 1. Upon invocation of clSetKernelArg(kernel, index, buffer) function, the buffer's reference count is incremented. However …
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Hi Coyote developers:
I am currently trying to run rdma_perf on Alveo U280 but failed when generating the bitstream. I have the following errors when synthesis. Is this due to the different vivado …
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We have around 25 users logged in with mix at standard resolution and output resolution at 1280x720 at 1024 Kbps Intel MCU 4.2.1 Ubuntu 18.04 GPU Accelerated.
When intel_gpu_top i can see render bu…
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Hi,
I'm trying to migrate the generated firmware for my keras model to Alveo U250 card using Vitis. I have attached my model definition below. I was able to do that with `Strategy: Resource` but no…
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Hello,
Thanks for this wonderful project.
I'm trying to deploy the Vortex GPU to Xilinx Alveo U50.
However, the IPC mismatches the results in Vortex Paper.
![paper](https://github.com/vortexgpg…