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It seems that when building with **option(NEON "Neon acceleration" ON)** and **option(AUTOVECTORIZE "Prefer autovectorizable code to one using C intrinsics" ON)**, the **arm_vec_exponent_f32** functio…
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This could _really_ benefit ARM-based things like the Raspberry Pi, which might not have shaders in the libretro core to accelerate the YUV->RGB conversion, but have NEON, so it can lessen the CPU cos…
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Feature gate: `#![feature(stdarch_neon_sha3)]`
This is a tracking issue for NEON intrinsics under the `sha3` feature.
### Public API
```rust
// core::arch::aarch64
fn veor3q*(…
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Feature gate: `#![feature(stdarch_neon_sm4)]`
This is a tracking issue for NEON intrinsics under the `sm4` feature.
### Public API
```rust
// core::arch::aarch64
fn vsm3*(..);…
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support for effectively doing float32 float64, but actually operating on the 2 lower lanes of a float32. Currently the narrowest conversion operation is float32 float64, which results in emitting ex…
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Hi,
I would like to propose the addition of complex arithmetic instructions to highway. This would allow us to take advantage of the SVE complex arithmetic instructions (svcadd, svcmla and svcdot),…
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Still there are a lot of rasterzing parts, not have SIMD operation.
We need a better fine-tuned software raster engine.
We can consider to apply AVX to some rasterizing methods in tvgSwRaster.cpp
…
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This is a tracking issue for the `#[target_feature]` segment of RFC 2045 (https://github.com/rust-lang/rfcs/pull/2045).
`#[cfg(target_feature)]` was tracked in [#29717](https://github.com/rust-lang/r…
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### Proposed new feature or change:
Continuing from and separately to https://github.com/numpy/numpy/pull/24018, let's discuss SIMD intrinsics here.
I understand there is an ongoing effort to repl…
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| | |
|--------------------|----|
| Bugzilla Link | [PR41636](https://bugs.llvm.org/show_bug.cgi?id=41636) |
| Status | NEW |
| Importance | P enhancemen…