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Using the [Imperas OVP virtual platform](https://riscv.org/software-status/#ovpsim) I have found a bug in Software_IRQHandler() at line 368 in [port.c](https://github.com/RISCV-on-Microsemi-FPGA/FreeR…
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Issues are for bugs in syzkaller itself, for everything else please contact syzkaller@googlegroups.com mailing list.
Before filing an issue please check the existing issues and the mailing list (ht…
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[do_compile.txt](https://github.com/riscv/riscv-linux/files/2277212/do_compile.txt)
Dear All
I met some kernel build error on
branch riscv-all commit ID : aef7a9cf2530c4ebabc0c6d2a64ee2100fc6b8…
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Eine Offline Sprachsteuerung / Assistent die komplett auf einem RPI 3 läuft.
https://snips.ai/
Übersicht über Projekte mit snips:
https://github.com/snipsco/awesome-snips
Eine Anbindung / Skil…
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I am surprised to see that some code in riscv-011.c depends on the idcode of the target which seems to make the implementation very SiFive specific rather that just depending on the DTM version. Why i…
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I downloaded and built from the example source code for ESP32LyraT.
And I flashed into ESP32LyraTDMSC. But, it does not work on ESP32LyraTDMSC.
I need example source code for ESP32LyraTDMSC.
Is it …
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I tried to run the dhrystone elf file that was in the system by default but it didn't seem to do anything. So, I attempted to build it but get this error about objdump not found during the build:
8…
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The vfastcfg encodings for register mappings in Appendix A are a great improvement over the previously proposed mappings, and I understand the desire to keep them to 7 bits for the vfastcfg instructio…
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DO NOT DELETE THIS INFORMATION.
> Please read this information carefully.
GitHub issues is for bugs, please do not post issues asking for help or how to do X, Y or Z.
You can use our irc chan…
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**Description**
linux-riscv do_fetch failed
**Steps to reproduce the issue:**
1.
mkdir riscv-yocto
repo init -u git://github.com/riscv/meta-riscv -b master -m tools/manifests/riscv…