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```
The following builds failed!
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atlys hdmi2usb lm32
atlys hdmi2usb mor1kx
atlys hdmi2usb picorv32
ice40_hx8k_b_evn base lm32
ice40_hx8k_b_evn …
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When building with nextpnr-ice40 in version .9 and .10 I get warnings such as:
"Warning: unmatched constraint 'clk_in' (on line 5)" for each set_io line in the .pcf.
You can still build and upload f…
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Currently the way to get a real rr_graph is to use the [ice40/utils/ice40_import_routing_from_icebox.py](https://github.com/mithro/symbiflow-arch-defs/blob/4mcmaster/ice40/utils/ice40_import_routing_f…
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I have compiled nexpnr and all seems to be working fine in non-gui mode, but when I run:
nextpnr-ice40 --gui at the terminal nothing happens, no CPU activity, no output, terminal held waiting....
I'…
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After waiting a few days without a response from Lattice for a free license, I decided to move forward without Icecube2 (Linux is more convenient for me, anyway!)
I've installed icestorm and the re…
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So, this is a pretty big challenge I think....
The iCE40 1K has the following resources;
* 1280 Logic Cells
* 64kbits Embedded RAM bits
* 1 PLL
However, there might be hope, your stats …
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Hello,
I'm trying the Murax soc on a Tang Nano 9k.
MuraxWithRamInit works with no issues. I'm able to run the demo, and to compile custom C software.
Now I want to try the XIP, to run code from a…
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Adding an issue here while I track it down.
Python on Windows is _slow_. Enough that I'm exceeding the 1-hour build time on AppVeyor when building ECP5. For comparison, here's the amount of time …
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VPR is does timing driven packing and routing. Hence it needs to know the timing information.
The iCE40 timing information is already known thanks to project icestorm. We just need to import it int…
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Column Buffer enabling is inferred via HLC. Moving to FASM with #447 turns on all the Column Buffers for now. This works but wastes power.
I think the correct way would be to model them in the rout…