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Thanks a lot for open-sourcing the verilog source code and corresponding bitstreams. I followed the instructions for the basys3 board trace collection and performed the CPA using the provided scripts.…
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How do I enable app module (dma_bench specifically) and integrate into the mqnic design?
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### Background Work
- [X] Yes, I searched the [mailing list](https://groups.google.com/forum/#!forum/firesim)
- [X] Yes, I searched [prior issues](https://github.com/firesim/firesim/issues)
- [X] Yes…
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Create a new issue from: https://github.com/Xilinx/RecoNIC/issues/13#issuecomment-1958287545
Q: For the HBM board (U280), can we start by building the shell without using the HBM?
A: To build U2…
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Hi Mr. Eugene,
i am trying to port this project to alveo u55c. One major change would be the memory because u55c only has HBM memory. I have a question regarding the C0_DDR4_AXI_CTRL signal as it ap…
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This intends to universalise the API between Alveo and MMIO
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Should it work ?
```
clinfo
Number of platforms: 2
Platform Profile: EMBEDDED_PROFILE
Platform Version: OpenCL 1.0
Platform Name: Xilinx
Platform Vendor: Xilinx
…
Sfinx updated
7 months ago
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Hi,
I test the performance of iperf, with 8 processes and 1.5KB MTU. However, the throughput is only 24G, much lower than 60G in the paper. Is there any optimization needed to achieve higher perfor…
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Hello,
This issue does not need a response. For the time being, I am moving to Vitis-AI. However, I wanted to let you know it seems like there are issues rebuilding the bnn-pynq examples.
I test…
gealy updated
3 months ago
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Would it be possible to create an index of all essence files that could be searched from the catalog? This is a new task I know, but it could be useful. We have searchable (text or pdf) files as follo…