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Dear Sir
When I upload icerok examples , I can run icerok Start Capture , Stop Capture. But the icerok.raw's size is 0.
It can not receive any data.
How can I use the icerok ?
My icestudio ve…
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When building ``./build.sh linux_aarch64``, there are three error messages about missing files.
```
install: /Users/user/projects/tools-oss-cad-suite-dev/repo/_upstream/linux_aarch64/oss-cad-su…
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I'm able to build and verify the `blinky_led` example with apio, but am unable to upload. I see the below error:
```
C:\Users\davec\Documents\apio\UPduino-v3.0\RTL\blink_led>apio upload
(DEBUG) Pro…
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This is very useful software which I would like to use on another FPGA board via the exported verilog file. However, the port names in the verilog file are random and it is hard to follow which one is…
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Gowin FPGA chips have open source toolchain support. Boards as sipeed tang nano 9k are cheap and powerfull, but proprietary chinese IDE is drawback. Would it be possible to add support for them? They …
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I've tried to extend the apio SConstruct to also support a VHDL toolchain, making use of yosys and the ghdl-yosys-plugin for synthesis. For simulation, plain ghdl is used instead.
The code is [here…
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Use apio 0.5.6, I get the error as seen in the image - if I use 0.4.1 however on the the BX at least all is good
![RS error](https://user-images.githubusercontent.com/60004943/101794339-c525d200-3ad4…
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My TinyFPGA-BX board appears in _lsusb_ as the following.
`Bus 001 Device 008: ID 1d50:6130 OpenMoko, Inc.`
I can build and upload code using command-line apio after having enabled the driver with…
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Hi!
I am trying out apio to see if it works on the raspberry pi zero with the icezero
https://blackmesalabs.wordpress.com/2017/02/07/icezero-fpga-board-for-rasppi/
https://shop.trenz-electro…
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Sigrock plugin is not correcly working on windows.
I debugged two reasons.
1. It's using icestudio folder for the raw file. That's forbidden unless running as administrator. It should use for exam…
aalku updated
3 years ago