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VPR is does timing driven packing and routing. Hence it needs to know the timing information.
The iCE40 timing information is already known thanks to project icestorm. We just need to import it int…
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Column Buffer enabling is inferred via HLC. Moving to FASM with #447 turns on all the Column Buffers for now. This works but wastes power.
I think the correct way would be to model them in the rout…
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People have a problem with the battery and, for example, turning off the smartphone under heavy load (when, for example, the battery still has 40%).
And all because of the lack of the ice40.bin calib…
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I am thinking to port this project to GOWIN GW2AR-18 FPGA
Got new board for it https://github.com/AI6YP/goryn
Where do you recommend to start?
drom updated
4 months ago
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The router run time for Quicklogic S3 device seems to be significantly slower than run time on ice40 device of around similar size. Please find attached VPR logs for 3 different designs.
S3 log f…
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Hi there,
I am looking to implement a simple (initially) IMU-less SteamVR tracker, and this project looks like a good starting point. It is my first use of programming an FPGA, but I would like to …
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### Version
Yosys 0.38 (git sha1 543faed9c8c, gcc 13.2.0-13 -fPIC -Os)
### On which OS did this happen?
Linux
### Reproduction Steps
```
yosys> read_verilog -sv cpu_flat.v
yosys> synth_ice40 -t…
spth updated
6 months ago
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While working on #244 I noticed that some designs result in yosys failing on `yosys-abc` call:
```
4.46.18. Finished OPT passes. (There is nothing left to do.)
4.47. Executing TECHMAP pass (map t…
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@mithro says he should do this.
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When I launch nextpnr, the following error shows up:
```
❯ /usr/local/bin/nextpnr-ice40
dyld: Library not loaded: @rpath/libQt5OpenGL.5.dylib
Referenced from: /usr/local/bin/nextpnr-ice40
Rea…