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Hi, When usning SiFiveTools->Flash MCS file to Arty FPGA in Freedom studio,I encounterd error:Unsupported DTM verdion:14.
The detailed log:
2019-07-05 13:48:17.811000: Running Command: C:\Jason\sifi…
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The `__metal_clic0_default_vector_handler` has 64 bytes alignment attribute.
https://github.com/sifive/freedom-metal/blob/26b85c959e279447e9c89f235e3793b358b1c981/src/drivers/sifive_clic0.c#L32-L33
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Add support for the hifive unleashed board and fu540 soc.
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## Description
+ In upstream repo , the latest version is [24.04](https://cdimage.ubuntu.com/releases//24.04)
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While the readme states
>The following commits (from [sifive/freedom-tools](https://github.com/sifive/freedom-tools/tree/master/src)) were used:
>
> the [sifive/riscv-gcc](https://github.com/s…
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## Desired Feature ##
Enable RISCV64 CPU architecture support in order to build coreos-assembler for native RISC-V boards.
## PR ##
* https://github.com/coreos/coreos-assembler/pull/3459
## …
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Review existing TL busDefs here: https://github.com/sifive/duh-bus/tree/master/specs/sifive.com/TL
Add `props` to https://github.com/sifive/duh-bus/tree/master/specs/sifive.com/TL
Similar to AXI…
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PIO only has the SiFive variant but we want https://github.com/xpack-dev-tools/riscv-none-embed-gcc-xpack/releases to be same as the the MounRiverStudio at least.
Toolchain can still be upgraded fr…
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Wit Version: 0.5
I'm going to talk through a use case that I was able to solve, but I think this is a common issue that might merit some better support:
### The problem
I want to develop on t…
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Take GPIO for example, there are `controlXType` and `mclock` in `GPIOAttachParams` .
https://github.com/sifive/sifive-blocks/blob/f79faa262dfad74d81d9bffd5469ad3de6fb244e/src/main/scala/devices/gp…