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Currently `parallel_for_workgroup` is implemented for intel devices, but will not work on Xilinx devices. It should hopefully be a very easy fix, but it's low priority for us at the time of writing th…
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Currently the work-items are either managed by OpenMP on CPU or with an OpenCL with 1 CU and 1 work-item with a software loop nest in it (because it is FPGA friendly).
For other accelerators such a…
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During San Diego C++ SG1 committee, Pablo Halpern (Intel) presented "Context Tokens for Parallel Algorithms" www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0335r1.pdf which is pretty close to the S…
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While SYCL is a standard, some implementations are better suited for some devices and it makes sense in a full platform to take advantage of multiple SYCL implementation in the same C++ program.
Whil…
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In address_space.hpp we define
cl::sycl::constant
cl::sycl::generic
etc.
alongside the cl::sycl::constant_ptr ones, however in the spec I can't see any mention of these, (the non-ptr variants)…
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The latest kernel constructor from the spec has
kernel(cl_kernel clKernel, const context& syclContext);
Should we change the boost::compute:: constructor to also take a syclContext?
Just wond…
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While working on the triSYCL compiler, I have just realized that at some point to generate some SPIR-df code we have to use the SPIR OpenCL intrinsics functions which are just normal C names according…
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I have a slowdown on the recent version of the `path_tracer` on my CPU laptop.
If you notice the same, can you bisect the change?
Perhaps some objects we copy instead of using by ref (in lambda?).
…
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Most templated SYCL classes already expose a number of member aliases and `constexpr` variables for communicating meta information about the given instance of the classes. Examples of these are the me…
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How much work is required to set up development on Xilinx FPGAs? What is the status of the project vis-a-vis Intel's Clang SYCL? Is there a chance of Intel's SYCL compiling to Xilinx FPGAs? What is th…